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"An Efficient VLSI Architecture for PRESENT Block Cipher and Its FPGA ..."

Jai Gopal Pandey, Tarun Goel, Abhijit Karmakar (2017)

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DOI: 10.1007/978-981-10-7470-7_27

access: closed

type: Conference or Workshop Paper

metadata version: 2022-04-09

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  dblp key:
  - conf/vdat/PandeyGK17
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  - https://dblp.org/rec/conf/vdat/PandeyGK17
Jai Gopal Pandey, Tarun Goel, Abhijit Karmakar:
An Efficient VLSI Architecture for PRESENT Block Cipher and Its FPGA Implementation. VDAT 2017: 270-278

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