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ORCIDMonther Abusultan
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Journal Articles
- 2021
[j3]Abbas A. Fairouz
, Monther Abusultan, Viacheslav V. Fedorov, Sunil P. Khatri:
Hardware Acceleration of Hash Operations in Modern Microprocessors. IEEE Trans. Computers 70(9): 1412-1426 (2021)- 2018
- [j2]Abbas A. Fairouz, Monther Abusultan, Amr Elshennawy, Sunil P. Khatri:
Comparing Leakage Reduction Techniques for an Asynchronous Network-on-Chip Router. J. Low Power Electron. 14(3): 414-427 (2018) - 2016
- [j1]Viacheslav V. Fedorov, Monther Abusultan, Sunil P. Khatri:
FTCAM: An Area-Efficient Flash-Based Ternary CAM Design. IEEE Trans. Computers 65(8): 2652-2658 (2016)
Conference and Workshop Papers
- 2017
- [c13]Monther Abusultan, Sunil P. Khatri:
Design of a Flash-based Circuit for Multi-valued Logic. ACM Great Lakes Symposium on VLSI 2017: 41-46 - [c12]Abbas A. Fairouz, Monther Abusultan, Sunil P. Khatri:
Circuit Level Design of a Hardware Hash Unit for use in Modern Microprocessors. ACM Great Lakes Symposium on VLSI 2017: 101-106 - 2016
- [c11]Monther Abusultan, Suman Chakravorty, Sunil P. Khatri:
A GPU-based implementation of a sensor tasking methodology. FUSION 2016: 1398-1405 - [c10]Monther Abusultan, Sunil P. Khatri:
A flash-based digital circuit design flow. ICCAD 2016: 6 - [c9]Monther Abusultan, Sunil P. Khatri:
Implementing low power digital circuits using flash devices. ICCD 2016: 109-116 - [c8]Abbas A. Fairouz, Monther Abusultan, Sunil P. Khatri:
A novel hardware hash unit design for modern microprocessors. ICCD 2016: 412-415 - [c7]Monther Abusultan, Sunil P. Khatri:
Exploring static and dynamic flash-based FPGA design topologies. ICCD 2016: 416-419 - [c6]Monther Abusultan, Sunil P. Khatri:
A Ternary-Valued, Floating Gate Transistor-Based Circuit Design Approach. ISVLSI 2016: 719-724 - 2015
- [c5]Monther Abusultan, Sunil P. Khatri:
Delay, Power and Energy Tradeoffs in Deep Voltage-scaled FPGAs. ACM Great Lakes Symposium on VLSI 2015: 111-114 - 2014
- [c4]Monther Abusultan, Sunil P. Khatri:
Look-up Table Design for Deep Sub-threshold through Full-Supply Operation. FCCM 2014: 259-266 - [c3]Monther Abusultan, Sunil P. Khatri:
FPGA LUT design for wide-band dynamic voltage and frequency scaled operation (abstract only). FPGA 2014: 241 - [c2]Monther Abusultan, Sunil P. Khatri:
A comparison of FinFET based FPGA LUT designs. ACM Great Lakes Symposium on VLSI 2014: 353-358 - [c1]Viacheslav V. Fedorov, Monther Abusultan, Sunil P. Khatri:
An area-efficient Ternary CAM design using floating gate transistors. ICCD 2014: 55-60
Coauthor Index
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