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Journal Articles
- 2017
[j4]Kyomin Sohn
, Won-Joo Yun, Reum Oh, Chi-Sung Oh, Seong-Young Seo, Min-Sang Park, Dong-Hak Shin, Won-Chang Jung, Sang-Hoon Shin, Je-Min Ryu, Hye-Seung Yu, Jae-Hun Jung, Hyunui Lee, Seok-Yong Kang, Young-Soo Sohn, Jung-Hwan Choi, Yong-Cheol Bae, Seong-Jin Jang, Gyo-Young Jin:
A 1.2 V 20 nm 307 GB/s HBM DRAM With At-Speed Wafer-Level IO Test Scheme and Adaptive Refresh Considering Temperature Distribution. IEEE J. Solid State Circuits 52(1): 250-260 (2017)- 2013
- [j3]Hyunui Lee, Yusuke Asada, Masaya Miyahara, Akira Matsuzawa:
A 6 bit, 7 mW, 700 MS/s Subranging ADC Using CDAC and Gate-Weighted Interpolation. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 96-A(2): 422-433 (2013) - [j2]Hyunui Lee, Masaya Miyahara, Akira Matsuzawa:
Design of Interpolated Pipeline ADC Using Low-Gain Open-Loop Amplifiers. IEICE Trans. Electron. 96-C(6): 838-849 (2013) - [j1]Hyunui Lee, Masaya Miyahara, Akira Matsuzawa:
A 12-bit Interpolated Pipeline ADC Using Body Voltage Controlled Amplifier. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 96-A(12): 2508-2515 (2013)
Conference and Workshop Papers
- 2016
- [c2]Hyunui Lee, Sukyong Kang, Hye-Seung Yu, Won-Joo Yun, Jae-Hun Jung, Sungoh Ahn, Wang-Soo Kim, Beomyong Kil, Yoo-Chang Sung, Sang-Hoon Shin, Yong-Sik Park, Yong-Hwan Kim, Kyung-Woo Nam, Indal Song, Kyomin Sohn, Yong-Cheol Bae, Jung-Hwan Choi, Seong-Jin Jang, Gyo-Young Jin:
Design of non-contact 2Gb/s I/O test methods for high bandwidth memory (HBM). A-SSCC 2016: 169-172 - 2013
- [c1]Hyunui Lee, Masaya Miyahara, Akira Matsuzawa:
A 12-bit interpolated pipeline ADC using body voltage controlled amplifier. NEWCAS 2013: 1-4
Coauthor Index
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