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Yankang Du
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Journal Articles
- 2019
- [j7]Yufeng Li, Yankang Du:
A Novel Software-Defined Convolutional Neural Networks Accelerator. IEEE Access 7: 177922-177931 (2019) - 2016
- [j6]Jiajin Zhang, Yang Housen, Yankang Du, Gao Quan, Peng Lin, Zhang Yue, Lichang Chen:
A DMR logic for mitigating the SET induced soft errors in combinational circuits. IEICE Electron. Express 13(2): 20150927 (2016) - [j5]Yankang Du, Shuming Chen:
A Novel Layout-Based Single Event Transient Injection Approach to Evaluate the Soft Error Rate of Large Combinational Circuits in Complimentary Metal-Oxide-Semiconductor Bulk Technology. IEEE Trans. Reliab. 65(1): 248-255 (2016) - 2015
- [j4]Ruiqiang Song, Shuming Chen, Yibai He, Yankang Du:
Flip-flops soft error rate evaluation approach considering internal single-event transient. Sci. China Inf. Sci. 58(6): 1-12 (2015) - 2014
- [j3]Bin Liang, Yankang Du, Hui Xu:
Mitigating the SERs of large combinational circuits by using half guard band technique in CMOS bulk technology. IEICE Electron. Express 11(19): 20140710 (2014) - [j2]Biwei Liu, Yankang Du, Kai Zhang:
Different Mechanisms of Temperature Dependency of N-Hit SET in Bulk and PD-SOI Technology. IEICE Trans. Electron. 97-C(5): 455-459 (2014) - 2013
- [j1]Yankang Du, Shuming Chen, Biwei Liu:
Impact of pulse quenching effect on soft error vulnerabilities in combinational circuits based on standard cells. Microelectron. J. 44(2): 65-71 (2013)
Conference and Workshop Papers
- 2019
- [c3]Yufeng Li, Yankang Du, Chenhong Cao, Han Qiu:
DIN: A Bio-Inspired Distributed Intelligence Networking. NPC 2019: 333-337 - 2018
- [c2]Yankang Du, Qinrang Liu, Shuai Wei, Chen Gao:
Software-Defined FPGA-Based Accelerator for Deep Convolutional Neural Networks: (Abstract Only). FPGA 2018: 291 - 2013
- [c1]Bin Liang, Yankang Du:
Two sides of pulse quenching effect on the single-event transient pulse width at circuit-level. ASICON 2013: 1-4
Coauthor Index
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