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Huaide Wang
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2020 – today
- 2024
- [j8]Yuan Zhu, Ruidong Xu
, Chongben Tao, Hao An, Huaide Wang, Zhipeng Sun, Ke Lu
:
DS-Trans: A 3D Object Detection Method Based on a Deformable Spatiotemporal Transformer for Autonomous Vehicles. Remote. Sens. 16(9): 1621 (2024) - [j7]Yuan Zhu, Hao An
, Huaide Wang, Ruidong Xu
, Mingzhi Wu, Ke Lu
:
RC-SLAM: Road Constrained Stereo Visual SLAM System Based on Graph Optimization. Sensors 24(2): 536 (2024) - [j6]Yuan Zhu, Hao An
, Huaide Wang, Ruidong Xu
, Zhipeng Sun, Ke Lu
:
DOT-SLAM: A Stereo Visual Simultaneous Localization and Mapping (SLAM) System with Dynamic Object Tracking Based on Graph Optimization. Sensors 24(14): 4676 (2024) - [c8]Yuan Zhu, Hao An, Huaide Wang, Ruidong Xu, Ke Lu:
Stereo Visual SLAM System with Road Constrained Based on Graph Optimization. ICIRA (8) 2024: 437-453 - 2023
- [c7]Zhihong Wu, Hao An
, Boyu Wu, Huaide Wang, Ke Lu:
A Visual-Inertial Fusion Mapping and Localization System Using AprilTag in GNSS-Denied Scenes. ICIRA (9) 2023: 261-272 - [c6]Zhihong Wu, Huaide Wang, Hao An, Yuan Zhu, Ruidong Xu, Ke Lu:
DPC-SLAM: Discrete Plane Constrained VSLAM for Intelligent Vehicle in Road Environment. ITSC 2023: 1555-1562
2010 – 2019
- 2014
- [c5]Chi-Cheng Ju, Tsu-Ming Liu, Huaide Wang, Yung-Chang Chang, Chih-Ming Wang, Chang-Lin Hsieh, Brian Liu, Hue-Min Lin, Chia-Yun Cheng, Chun-Chia Chen, Min-Hao Chiu, Sheng-Jen Wang, Ping Chao, Meng-Jye Hu, Ryan Yeh, Ted Chuang, Hsiu-Yi Lin, Chung-Hung Tsai:
A 4K×2K@60fps multi-standard TV SoC processor with integrated HDMI/MHL receiver. VLSIC 2014: 1-2 - 2011
- [j5]Shih-Jou Huang, Yu-Ching Yeh, Huaide Wang, Pang-Ning Chen, Jri Lee:
W-Band BPSK and QPSK Transceivers With Costas-Loop Carrier Recovery in 65-nm CMOS Technology. IEEE J. Solid State Circuits 46(12): 3033-3046 (2011) - [c4]Shih-Jou Huang, Yu-Ching Yeh, Huaide Wang, Pang-Ning Chen, Jri Lee:
An 87GHz QPSK transceiver with costas-loop carrier recovery in 65nm CMOS. ISSCC 2011: 168-170 - 2010
- [j4]Huaide Wang, Jri Lee:
A 21-Gb/s 87-mW Transceiver With FFE/DFE/Analog Equalizer in 65-nm CMOS Technology. IEEE J. Solid State Circuits 45(4): 909-920 (2010)
2000 – 2009
- 2009
- [j3]Jri Lee, Huaide Wang:
Study of Subharmonically Injection-Locked PLLs. IEEE J. Solid State Circuits 44(5): 1539-1553 (2009) - [c3]Jri Lee, Huaide Wang, Wen-Tsao Chen, Yung-Pin Lee:
Subharmonically injection-locked PLLs for ultra-low-noise clock generation. ISSCC 2009: 92-93 - 2008
- [j2]Jri Lee, Mingchung Liu, Huaide Wang:
A 75-GHz Phase-Locked Loop in 90-nm CMOS Technology. IEEE J. Solid State Circuits 43(6): 1414-1426 (2008) - [j1]Jri Lee, Ming-Shuan Chen, Huaide Wang:
Design and Comparison of Three 20-Gb/s Backplane Transceivers for Duobinary, PAM4, and NRZ Data. IEEE J. Solid State Circuits 43(9): 2120-2133 (2008) - [c2]Jri Lee, Ming-Shuan Chen, Huaide Wang:
A 20Gb/s Duobinary Transceiver in 90nm CMOS. ISSCC 2008: 102-103 - 2007
- [c1]Jri Lee, Huaide Wang:
A 20Gb/s Broadband Transmitter with Auto-Configuration Technique. ISSCC 2007: 444-614
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