Zhengya Zhang

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Cheng-Hsun Lu

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Publications

2024
[j38]
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Wei Tang, Sung-Gun Cho, Tim Tri Hoang, Jacob Botimer, Wei Qiang Zhu, Ching-Chi Chang, Cheng-Hsun Lu, Junkang Zhu, Yaoyu Tao, Tianyu Wei, Naomi Kavi Motwani, Mani Yalamanchi, Ramya Yarlagadda, Sirisha Rani Kale, Mark Flanigan, Allen Chan, Thungoc Tran, Sergey Y. Shumarayev, Zhengya Zhang:
Arvon: A Heterogeneous System-in-Package Integrating FPGA and DSP Chiplets for Versatile Workload Acceleration. IEEE J. Solid State Circuits 59(4): 1235-1245 (2024)
[j37]
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Jie-Fang Zhang, Cheng-Hsun Lu, Zhengya Zhang:
TetriX: Flexible Architecture and Optimal Mapping for Tensorized Neural Network Processing. IEEE Trans. Computers 73(5): 1219-1232 (2024)
2023
[c63]
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  - conf/vlsit/TangCHBZCLZTWMY23
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Wei Tang, Sung-Gun Cho, Tim Tri Hoang, Jacob Botimer, Wei Qiang Zhu, Ching-Chi Chang, Cheng-Hsun Lu, Junkang Zhu, Yaoyu Tao, Tianyu Wei, Naomi Kavi Motwani, Mani Yalamanchi, Ramya Yarlagadda, Sirisha Kale, Mark Flannigan, Allen Chan, Thungoc Tran, Sergey Y. Shumarayev, Zhengya Zhang:
Arvon: A Heterogeneous SiP Integrating a 14nm FPGA and Two 22nm 1.8TFLOPS/W DSPs with 1.7Tbps/mm² AIB 2.0 Interface to Provide Versatile Workload Acceleration. VLSI Technology and Circuits 2023: 1-2

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