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ORCIDIEEE Transactions on Computers, Volume 31
Volume 31, Number 1, January 1982
- Thomas W. Williams, Kenneth P. Parker:
Design for Testability - A Survey. 2-15 - Richard R. Shively:
Architecture of a Programmable Digital Signal Processor. 16-22 - Vijay K. Vaishnavi:
Computing Point Enclosures. 22-29 - Michael Feuer:
Connectivity of Random Logic. 29-33 - André Thayse:
Synthesis and Optimization of Programs by Means of P-Funktions. 34-40 - Perng-Yi Richard Ma, Edward Y. S. Lee, Masahiro Tsuchiya:
A Task Allocation Model for Distributed Computing Systems. 41-47 - Hector Garcia-Molina:
Elections in a Distributed Computing System. 48-59 - Bruce W. Arden, Hikyu Lee:
A Regular Network for Multicomputer Systems. 60-69
- Vojin G. Oklobdzija, Milos D. Ercegovac:
A On-Line Square Root Algorithm. 70-75 - Gerhard Wustmann:
Autocorrelation Function of Filtered p-Level Maximal-Length Sequences. 75-77 - G. Lacroix, Philippe Marchegay, G. Piel:
Comments on "The Anomalous Behavior of Flip-Flops in Synchronizer Circuits". 77-78 - Richard W. Heuft, Warren D. Little:
Improved Time and Parallel Processor Bounds for Fortran-Like Loops. 78-81
Volume 31, Number 2, February 1982
- Louis J. Hafer, Alice C. Parker:
Automated Synthesis of Digital Hardware. 93-109 - David D. Riley, Robert J. Baron:
Design and Evaluation of a Synchronous Triangular Interconnection Scheme for Interprocessor Communications. 110-118 - Stefano Ceri, Giuseppe Pelagatti:
Allocation of Operations in Distributed Database Access. 119-129 - Yacoub M. El-Ziq, Stephen Y. H. Su:
Fault Diagnosis of MOS Combinational Networks. 129-139 - X. Chen, Stanley L. Hurst:
A Comparison of Universal-Logic-Module Realizations and Their Application in the Synthesis of Combinatorial and Sequential Logic Networks. 140-147 - David Nassimi, Sartaj Sahni:
Parallel Algorithms to Set Up the Benes Permutation Network. 148-154 - Martin De Prycker:
A Performance Analysis of the Implementation of Addressing Methods in Block-Structured Languages. 155-163
- Michael J. O'Donnell, Carl H. Smith:
A Combinatorial Problem Concerning Processor Interconnection Networks. 163-164 - Pramod K. Varshney, Carlos R. P. Hartmann, Jamie M. de Faria Jr.:
Application of Information Theory to Sequential Fault Diagnosis. 164-170 - Kuang Y. Liu:
Architecture for VLSI Design of Reed-Solomon Encoders. 170-175 - Peter R. Roeser, M. E. Jernigan:
Fast Haar Transform Algorithms. 175-177
Volume 31, Number 3, March 1982
- Hans-Werner Six, Derick Wood:
Counting and Reporting Intersections of d-Ranges. 181-187 - Toshihide Ibaraki, Tsunehiko Kameda:
Deadlock-Free Systems for a Bounded Number of Processes. 188-193 - Werner E. Kluge, Kurt Lautenbach:
The Orderly Resolution of Memory Access Conflicts Among Competing Channel Processes. 194-207 - Leah J. Siegel, Howard Jay Siegel, Arthur E. Feather:
Parallel Processing Approaches to Image Correlation. 208-218 - Will E. Leland, Marvin H. Solomon:
Dense Trivalent Graphs for Processor Interconnection. 219-222 - Gregor von Bochmann:
Hardware Specification with Temporal Logic: En Example. 223-231 - Jochen A. G. Jess, H. G. M. Kees:
A Data Structure for Parallel L/U Decomposition. 231-239 - Marco Ajmone Marsan, Mario Gerla:
Markovs Models for Multiple Bus Multiprocessor Systems. 239-248 - Robert Geist, Kishor S. Trivedi:
Optimal Design of Multilevel Storage Hierarchies. 249-260 - Richard P. Brent, H. T. Kung:
A Regular Layout for Parallel Adders. 260-264
- Marek Kubale
:
Comments on "Decomposition of Permutation Networks". 265 - Noel R. Strader II:
Comments on "Magnetic Bubble Memory Architectures for Supporting Associative Searching of Relational Databases". 265-266
Volume 31, Number 4, April 1982
- George B. Adams III, Howard Jay Siegel:
On the Number of Permutations Performable by the Augmented Data Manipulator Network. 270-277 - Jarek Deminet:
Experience with Multiprocessor Algorithms. 278-288 - John P. Fishburn, Raphael A. Finkel:
Quotient Networks. 288-295 - Janak H. Patel:
Analysis of Multiprocessors with Private Cache Memories. 296-304 - Gabriel M. Silberman:
Determining Fault Ratios in Multilevel Delayed-Staging Storage Hierarchies. 305-310 - Catherine Bellon, Gabriele Saucier:
Protection Against External Errors in a Dedicated System. 311-317
- Chung-Ho Chen:
An Algebraic Model of Arithmetic Codes. 318-321 - Fred J. Taylor, Chao H. Huang:
An Autoscale Residue Multiplier. 321-325 - Henk J. Sips:
Comments on "An O(n) Parallel Multiplier with Bit-Sequential Input and Output". 325-327 - Eiichi Tanaka, King-sun Fu:
Correction to "Error-Correcting Parsers for Formal Languages". 327-328 - Alan Feldstein, Richard Goodman:
Loss of Significance in Floating Point Subtraction and Addition. 328-335 - Laxmi N. Bhuyan, Dharma P. Agrawal:
On the Generalized Binary System. 335-338 - David Nassimi, Sartaj Sahni:
Optimal BPC Permutations on a Cube Connected SIMD Computer. 338-341
Volume 31, Number 5, May 1982
- Neil R. Lincoln:
Technology and Design Tradeoffs in the Creation of a Modern Supercomputer. 349-362 - David J. Kuck, Richard A. Stokes:
The Burroughs Scientific Processor (BSP). 363-376 - Kenneth E. Batcher:
Bit-Serial Parallel Processing Systems. 377-384 - Robert G. Arnold, Robert O. Berg, James W. Thomas:
A Modular Approach to Real-Time Supersystems. 385-398 - Earl E. Swartzlander Jr., Barry K. Gilbert:
Supersystems: Technology and Architecture. 399-409 - James P. Ignizio, David F. Palmer, Catherine M. Murphy:
A Multicriteria Approach to Supersystem Architecture Definition. 410-418 - Keki B. Irani, Nicholas G. Khabbaz:
A Methodology for the Design of Communication Networks and the Distributuion of Data in Distributed Supercomputer Systems. 419-434 - Duncan H. Lawrie, Chandra R. Vora:
The Prime Memory System for Array Access. 435-442 - George B. Adams III, Howard Jay Siegel:
The Extra Stage Cube: A Fault-Tolerant Interconnection Network for Supersystems. 443-454 - Bruce W. Arden, Ran Ginosar:
MP/C: A Multiprocessor/Computer Architecture. 455-473
Volume 31, Number 6, June 1982
- Der-Tsai Lee:
On k-Nearest Neighbor Voronoi Diagrams in the Plane. 478-487 - Svetlana P. Kartashev, Steven I. Kartashev:
Distribution of Programs for a System with Dynamic Architecture. 488-514 - Howard Trickey:
Good Layouts for Pattern Recognizers. 514-520 - Bella Bose, T. R. N. Rao:
Theory of Unidirectional Error Correcting/Detecting Codes. 521-530 - Flaviu Cristian:
Exception Handling and Software Fault Tolerance. 531-540 - Fred J. Taylor:
A VLSI Residue Arithmetic Multiplier. 540-546
- Daniel M. Dias, Manoj Kumar:
Comments on "Interference Analysis of Shuffle/Exchange Networks". 546-547 - John J. Metzner:
Convolutionally Encoded Memory Protection. 547-551 - William A. Porter:
Error Tolerant Design of Multivalued Logic Functions. 551-554 - Akira Shiozaki:
Single Asymmetric Error-Correcting Cyclic AN Codes. 554-555 - Hideo Fujiwara, Shunichi Toida:
The Complexity of Fault Detection Problems for Combinational Logic Circuits. 555-560 - W. F. Mikhail, R. W. Bartoldus, R. A. Rutledge:
The Reliability of Memory with Single-Error Correction. 560-564 - Bella Bose, Dhiraj K. Pradhan:
Optimal Unidirectional Error Detecting/Correcting Codes. 564-568
Volume 31, Number 7, July 1982
- Ytzhak H. Levendel, Premachandran R. Menon:
Test Generation Algorithms for Computer Hardware Description Languages. 577-588 - Janak H. Patel, Leona Y. Fung:
Concurrent Error Detection in ALU's by Recomputing with Shifted Operands. 589-595 - Shigeo Kaneda, Eiji Fujiwara:
Single Byte Error Correcting - Double Byte Error Detecting Codes for Memory Systems. 596-602 - David J. Taylor, James P. Black:
Principles of Data Structure Error Correction. 602-608 - Tülin Erdim Mangir, Algirdas Avizienis:
Fault-Tolerant Design for VLSI: Effect of Interconnect Requirements on Yield Improvement of VLSI Designs. 609-616 - P. M. Melliar-Smith, Richard L. Schwartz:
Formal Specification and Mechanical Verification of SIFT: A Fault-Tolerant Flight Control System. 616-630 - Harry Rudin, Colin H. West:
A Validation Technique for Tightly Coupled Protocols. 630-636 - Jean-Michel Ayache, Jean-Pierre Courtiat, Michel Diaz:
REBUS, A Fault-Tolerant Distributed System for Industrial Real-Time Control. 637-647 - John F. Meyer:
Closed-Form Solutions of Performability. 648-657 - Xavier Castillo, Stephen R. McConnel, Daniel P. Siewiorek:
Derivation and Calibration of a Transient Error Reliability Model. 658-671
- Miron Abramovici:
A Hierarchical, Path-Oriented Approach to Fault Diagnosis in Modular Combinational Circuits. 672-677 - Javad Khakbaz:
Totally Self-Checking Checker for 1-out-of-n Code Using Two-Rail Codes. 677-681 - David J. Lu:
Watchdog Processors and Structural Integrity Checking. 681-685 - Ali Mili:
Self-Stabilizing Programs: The Fault-Tolerant Capability of Self-Checking Programs. 685-689 - Robert E. Glaser, Gerald M. Masson:
The Containment Set Approach to Upsets in Digital Systems. 689-692 - Santosh K. Shrivastava, Fabio Panzieri:
The Design of a Reliable Remote Procedure Call Mechanism. 692-697 - Ravishankar K. Iyer, Steven E. Butner, Edward J. McCluskey:
A Statistical Failure/Load Relationship: Results of a Multicomputer Study. 697-706
Volume 31, Number 8, August 1982
- George W. Gerrity:
Computer Representation of Real Numbers. 709-714 - Donald F. Towsley, G. Venkatesh:
Window Random Access Protocols for Local Computer Networks. 715-722 - Paul D. Amer:
A Measurement Center for the NBS Local Area Computer Network. 723-729 - Gerard J. Holzmann:
A Theory for Protocol Validation. 730-738 - Jinpo Wang:
Delay and Throughput Analysis for Computer Communications with Balanced HDLC Procedures. 739-746 - To-Yat Cheung:
A Method for Equijoin Queries in Distributed Relational Databases. 746-751 - Vittal Kini, Daniel P. Siewiorek:
Automatic Generation of Symbolic Reliability Functions for Processor-Memory-Switch Structures. 752-771 - Edmund M. Clarke, Christos Nikolaou:
Distributed Reconfiguration Strategies for Fault-Tolerant Multiprocessor Systems. 771-784 - Gérard Memmi, Yves Raillard:
Some New Results About the (d, k) Graph Problem. 784-791
- Noel R. Strader, V. Thomas Rhyne:
A Canonical Bit-Sequential Multiplier. 791-795 - J. M. Herron, J. Farley, Kendall Preston Jr., H. Sellner:
A General-Purpose High-Speed Logical Transform Image Processor. 795-800 - John P. Robinson, Chia-Lung Yeh:
A Method for Modulo-2 Minimization. 800-801 - Sebastián Dormido, M. A. Canto:
An Upper Bound for the Synthesis of Generalized Parallel Counters. 802-805
Volume 31, Number 9, September 1982
- Peter M. Flanders:
A Unified Approach to a Class of Data Movements on an Array Processor. 809-819 - Masahiro Sowa, Tadao Murata:
A Data Flow Computer Architecture with Program and Token Memories. 820-824 - Forbes J. Burkowski:
A Hardware Hashing Scheme in the Design of a Multiterm String Comparator. 825-834 - Wesley W. Chu, Paul Hurley:
Optimal Query Processing for Distributed Database Systems. 835-850 - Martin C. Wei, Howard A. Sholl:
An Expression Model for Extraction and Evaluation of Parallelism in Control Structures. 851-863 - Dhiraj K. Pradhan, Sudhakar M. Reddy:
A Fault-Tolerant Communication Architecture for Distributed Systems. 863-870 - Hung Chi Lai, Saburo Muroga:
Logic Networks of Carry-Save Adders. 870-882 - Martin De Prycker:
On the Development of a Measurement System for High Level Language Program Statistics. 883-891 - Thomas Ottmann, Arnold L. Rosenberg, Larry J. Stockmeyer:
A Dictionary Machine (for VLSI). 892-897
- V. A. Signaevskii:
Comments on "Multiprocessor Scheduling with Memory Allocation - A Deterministic Approach". 898-899 - Farhad Kamangar, K. R. Rao:
Fast Algorithms for the 2-D Discrete Cosine Transform. 899-906 - Romas Aleliunas, Arnold L. Rosenberg:
On Embedding Rectangular Grids in Square Grids. 907-913 - Michael K. Molloy:
Performance Analysis Using Stochastic Petri Nets. 913-917
Volume 31, Number 10, October 1982
- Chuan-lin Wu, Tse-Yun Feng, Min-Chang Lin:
Star: A Local Network System for Real-Time Management of Imagery Data. 923-933 - Michael R. Warpenburg, Leah J. Siegel:
SIMD Image Resampling. 934-942 - Todd R. Kushner, Angela Y. Wu, Azriel Rosenfeld:
Image Processing on ZMOB. 943-951 - Dharma P. Agrawal, Ramesh C. Jain:
A Pipelined Pseudoparallel System Architecture for Real-Time Dynamic Scene Analysis. 952-962 - Wesley E. Snyder, Carla D. Savage:
Content Adressable Read/Write Memories for Image Analysis. 963-968 - Faye A. Briggs, King-sun Fu, Kai Hwang, Benjamin W. Wah:
PUMPS Architecture for Pattern Analysis and Image Database Management. 969-983 - Kazunori Yamaguchi, Tosiyasu L. Kunii:
PICCOLO Logic for a Picture Database Computer and Its Implementation. 983-996
- Dan Antonsson, Björn Gudmundsson, Tomas Hedblom, Björn Kruse, Arne Linge, Peter Lord, Tomas Ohlsson:
PICAP - A System Approach to Image Processing. 997-1000 - Ashok V. Kulkarni, David W. L. Yen:
Systolic Processing and an Implementation for Signal and Image Processing. 1000-1009 - Howard A. Sholl, Kevin Morris, James Norris:
A Multimicroprocessor System for Real-Time Classification of Railroad Track Flaws. 1009-1017 - Lionel M. Ni, Kwan Y. Wong, Daniel T. Lee, Ronnie K. Poon:
A Microprocessor-Based Office Image Processing System. 1017-1022 - Leonard Uhr:
Comparing Serial Computers, Arrays, and Networks Using Measures of "Active Resources". 1022-1025 - Prashant D. Vaidya, Linda G. Shapiro, Robert M. Haralick, Gary J. Minden:
Design and Architectural Implications of a Spatial Information System. 1025-1031
Volume 31, Number 11, November 1982
- Richard E. Buehrer, Hans-Joerg Brundiers, Hans Benz, Bernard Bron, Hansmartin Friess, Walter Haelg, Hans Jürgen Halin, Anders Isacson, Milan Tadian:
The ETH-Multiprocessor EMPRESS: A Dynamically Configurable MIMD System. 1035-1044 - Kang G. Shin, Yann-Hang Lee, J. Sasidhar:
Design of HM2p - A Hierarchical Multimicroprocessor for General Purpose Applications. 1045-1053 - Sun-Yuan Kung, K. S. Arun, Ron J. Gal-Ezer, D. V. Bhaskar Rao:
Wavefront Array Processor: Language, Architecture, and Applications. 1054-1066 - Keki B. Irani, Kuo-Wei Chen:
Minimization of Interprocessor Communication for Parallel Computation. 1067-1075 - Robert K. Montoye, Duncan H. Lawrie:
A Practical Algorithm for the Solution of Triangular Systems on a Parallel Processing System. 1076-1082 - Michel Dubois, Faye A. Briggs:
Effects of Cache Coherency in Multiprocessors. 1083-1099 - Philip Heidelberger, Kishor S. Trivedi:
Queueing Network Models for Parallel Processing with Asynchronous Tasks. 1099-1109
- Mark A. Franklin, Donald F. Wann, William J. Thomas:
Pin Limitations and Partitioning of VLSI Interconnection Networks. 1109-1116 - David W. L. Yen, Janak H. Patel, Edward S. Davidson:
Memory Interference in Synchronous Multiprocessor Systems. 1116-1121 - Dan I. Moldovan:
On the Analysis and Synthesis of VLSI Algorithms. 1121-1126 - Bruce W. Weide:
Modeling Unusual Behavior of Parallel Algorithms. 1126-1130
Volume 31, Number 12, December 1982
- Lee A. Hollaar:
Direct Implementation of Asynchronous Control Units. 1133-1141 - Takanobu Baba, Ken Ishikawa, Kenzo Okuda:
A Two-Level Microprogrammed Multiprocessor Computer with Nonnumeric Functions. 1142-1156 - Erol Gelenbe, Alain Lichnewsky, Andreas Stafylopatis:
Experience with the Parallel Solutions of Partial Differential Equations on a Distributed Computing System. 1157-1164 - Miron Abramovici, Melvin A. Breuer:
Fault Diagnosis in Synchronous Sequential Circuits Based on an Effect-Cause Analysis. 1165-1172 - Shinji Nakamura, Gerald M. Masson:
Lower Bounds on Crosspoints in Concentrators. 1173-1179 - Marco Ajmone Marsan, Gianfranco Balbo, Gianni Conte:
Comparative Performance Analysis of Single Bus Multiprocessor Architectures. 1179-1191 - Hiroto Yasuura, Naofumi Takagi, Shuzo Yajima:
The Parallel Enumeration Sorting Scheme for VLSI. 1192-1201 - Robert J. McMillen, Howard Jay Siegel:
Routing Schemes for the Augmented Data Manipulator Network in an MIMD System. 1202-1214 - Kai Hwang, Yeng-Heng Cheng:
Partitioned Matrix Algorithms for VLSI Arithmetic Systems. 1215-1224
- D. T. Lee, Charles B. Silio Jr.:
An Optimal Illumination Region Algorithm for Convex Polygons. 1225-1227 - Tomás Lang, Mateo Valero, Ignacio Alegre:
Bandwidth of Crossbar and Multiple-Bus Connections for Multiprocessors. 1227-1234
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