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ORCIDMicroelectronics Journal, Volume 81
Volume 81, November 2018
- Milad Shariatifar, Mohsen Jalali, Abdolali Abdipour:
A methodology for designing class-F-1/J(J-1) high efficiency concurrent dual-band power amplifier. 1-7 - Senthil Sivakumar
, S. P. Joy Vasantha Rani:
An ADC BIST using on-chip ramp generation and digital ORA. 8-15 - Mojtaba Valinataj, Abbas Mohammadnezhad, Jari Nurmi:
A low-cost high-speed self-checking carry select adder with multiple-fault detection. 16-27 - Lourembam Beloni Devi, Kundan Singh, Asutosh Srivastava:
Impact of substrate bias and dielectrics on the performance parameters of symmetric lateral bipolar transistor on SiGe-OI for mixed signal applications. 28-41 - Farzan Rezaei:
A new active resistor and its application to a CMOS transconductor. 42-50 - Khaled A. Helal, Sameh Attia, Hossam A. H. Fahmy, Tawfik Ismail, Yehea Ismail, Hassan Mostafa:
Dual Split-Merge: A high throughput router architecture for FPGAs. 51-57 - Laxmidhar Biswal, Rakesh Das, Chandan Bandyopadhyay, Anupam Chattopadhyay, Hafizur Rahaman:
A template-based technique for efficient Clifford+T-based quantum circuit implementation. 58-68 - Liuyang Zhang, Erya Deng, Hao Cai, You Wang, Lionel Torres, Aida Todri-Sanial, Youguang Zhang:
A high-reliability and low-power computing-in-memory implementation within STT-MRAM. 69-75 - Mahdi Hosseinnejad, Abbas Erfanian, Mohammad Azim Karami:
A fully digital BPSK demodulator for biomedical application. 76-83 - Umut Engin Ayten, Erkan Yüce, Shahram Minaei:
A voltage-mode PID controller using a single CFOA and only grounded capacitors. 84-93 - Olujide Adenekan, Paul Holland, Karol Kalna:
Optimisation of lateral super-junction multi-gate MOSFET for high drive current and low specific on-resistance in sub-100 V applications. 94-100 - Naveen Kadayinti, Maryam Shojaei Baghini, Dinesh Kumar Sharma:
Measurements of the effect of jitter on the performance of clock retiming circuits for on-chip interconnects. 101-106 - Amr Baher, Ahmed N. El-Zeiny, Ahmed Aly, Ahmed H. Khalil, Adham Hassan, AbdelRahman Saeed, Karim Abo El Makarem, Magdy A. El-Moursy, Hassan Mostafa:
Dynamic power estimation using Transaction Level Modeling. 107-116 - Vikas Rana, Marco Pasotti, Marcella Carissimi:
Row decoder for embedded Phase Change Memory using low voltage transistors. 117-122 - Maryam Rezaei-Ravari, Vahid Sattari Naeini:
Dynamic clustering-based routing scheme for 2D-Mesh networks-on-chip. 123-136 - Soheil Salehi, Ronald F. DeMara:
SLIM-ADC: Spin-based Logic-In-Memory Analog to Digital Converter leveraging SHE-enabled Domain Wall Motion devices. 137-143 - Farimah R. Poursafaei, Mostafa Bazzaz, Morteza Mohajjel Kafshdooz, Alireza Ejlali:
Slack clustering for scheduling frame-based tasks on multicore embedded systems. 144-153 - Jiangtao Xu, Xiaolin Shi, Shuang Xu, Zhaoyang Yin:
10-bit Single-Slope ADC with error quantification and double reset technique for CMOS image sensor. 154-161 - Omar Elwy, Somia H. Rashad, Lobna A. Said, Ahmed G. Radwan:
Comparison between three approximation methods on oscillator circuits. 162-178 - Young Jun Park, Parth Parekh, Fei Yuan:
All-digital ΔΣ time-to-digital converter with Bi-Directional gated delay line time integrator. 179-191 - Seng Siong Lee, Lini Lee, Wai Lee Kung, Ahmed Saad, Gim Heng Tan:
A fully integrated and high precision 350 mV amplitude regulated LVDS transmitter compensating PVT variations. 192-199 - Jianhui Wu, Zushuai Xie, Tianji Yu, Chao Chen:
A wide tuning range Gm-C complex filter with master-slave automatic frequency tuning based switched-capacitor. 200-207
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