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2020 – today
- 2023
[j38]Deborah Volpe
, Giovanni Amedeo Cirillo, Maurizio Zamboni, Giovanna Turvani:
Integration of Simulated Quantum Annealing in Parallel Tempering and Population Annealing for Heterogeneous-Profile QUBO Exploration. IEEE Access 11: 30390-30441 (2023)- 2022
- [j37]Luigi Giuffrida, Deborah Volpe, Giovanni Amedeo Cirillo, Maurizio Zamboni, Giovanna Turvani:
Engineering Grover Adaptive Search: Exploring the Degrees of Freedom for Efficient QUBO Solving. IEEE J. Emerg. Sel. Topics Circuits Syst. 12(3): 614-623 (2022) - [j36]Mario Simoni, Giovanni Amedeo Cirillo, Giovanna Turvani, Mariagrazia Graziano, Maurizio Zamboni:
Towards Compact Modeling of Noisy Quantum Computers: A Molecular-Spin-Qubit Case of Study. ACM J. Emerg. Technol. Comput. Syst. 18(1): 11:1-11:26 (2022) - [j35]Andrea Coluccio, Umberto Casale, Angela Guastamacchia, Giovanna Turvani, Marco Vacca, Massimo Ruo Roch, Maurizio Zamboni, Mariagrazia Graziano:
Hybrid-SIMD: A Modular and Reconfigurable Approach to Beyond von Neumann Computing. IEEE Trans. Computers 71(9): 2287-2299 (2022) - 2021
- [c51]Andrea Marchesin, Giovanna Turvani, Andrea Coluccio, Fabrizio Riente, Marco Vacca, Massimo Ruo Roch, Mariagrazia Graziano, Maurizio Zamboni:
Octantis: An Exploration Tool for Beyond von Neumann architectures. DTIS 2021: 1-5 - 2020
- [j34]Milena Andrighetti, Giovanna Turvani, Giulia Santoro, Marco Vacca, Andrea Marchesin, Fabrizio Ottati, Massimo Ruo Roch, Mariagrazia Graziano, Maurizio Zamboni:
Data Processing and Information Classification - An In-Memory Approach. Sensors 20(6): 1681 (2020)
2010 – 2019
- 2019
- [c50]Milena Andrighetti, Giovanna Turvani, Giulia Santoro, Marco Vacca, Massimo Ruo Roch, Maurizio Graziano, Maurizio Zamboni:
Bitmap Index: A Processing-in-Memory Reconfigurable Implementation. ApplePies 2019: 173-179 - [c49]Simone Domenico Antonietta, Andrea Coluccio, Giovanna Turvani, Marco Vacca, Mariagrazia Graziano, Maurizio Zamboni:
WINNER: a high speed high energy efficient Neural Network implementation for image classification. ICECS 2019: 29-32 - 2018
- [j33]Giulia Santoro, Marco Vacca, Matteo Bollo, Fabrizio Riente, Mariagrazia Graziano, Maurizio Zamboni:
Exploration of multilayer field-coupled nanomagnetic circuits. Microelectron. J. 79: 46-56 (2018) - 2017
- [j32]Giovanna Turvani, Fabrizio Riente, Fabrizio Cairo, Marco Vacca, Umberto Garlando, Maurizio Zamboni, Mariagrazia Graziano:
Efficient and reliable fault analysis methodology for nanomagnetic circuits. Int. J. Circuit Theory Appl. 45(5): 660-680 (2017) - [j31]Fabrizio Riente, Giovanna Turvani, Marco Vacca, Massimo Ruo Roch, Maurizio Zamboni, Mariagrazia Graziano:
ToPoliNano: A CAD Tool for Nano Magnetic Logic. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(7): 1061-1074 (2017) - [j30]Fabrizio Cairo, Marco Vacca, Giovanna Turvani, Maurizio Zamboni, Mariagrazia Graziano:
Domain Wall Interconnections for NML. IEEE Trans. Very Large Scale Integr. Syst. 25(11): 3067-3076 (2017) - [c48]Matteo Bollo, Giulia Santoro, Umberto Garlando, Maurizio Zamboni:
NANOcom: A Mosaic Approach for nanoelectronic circuits design. DTIS 2017: 1-6 - 2016
- [j29]Giovanni Causapruno, Fabrizio Riente, Giovanna Turvani, Marco Vacca, Massimo Ruo Roch, Maurizio Zamboni, Mariagrazia Graziano:
Reconfigurable Systolic Array: From Architecture to Physical Design for NML. IEEE Trans. Very Large Scale Integr. Syst. 24(11): 3208-3217 (2016) - [c47]Giovanni Causapruno, Umberto Garlando, Fabrizio Cairo, Maurizio Zamboni, Mariagrazia Graziano:
A Reconfigurable Array Architecture for NML. ISVLSI 2016: 99-104 - 2015
- [j28]Giovanni Causapruno, Marco Vacca, Mariagrazia Graziano, Maurizio Zamboni:
Interleaving in Systolic-Arrays: A Throughput Breakthrough. IEEE Trans. Computers 64(7): 1940-1953 (2015) - [j27]Giovanni Causapruno, Gianvito Urgese, Marco Vacca, Mariagrazia Graziano, Maurizio Zamboni:
Protein Alignment Systolic Array Throughput Optimization. IEEE Trans. Very Large Scale Integr. Syst. 23(1): 68-77 (2015) - [j26]Marco Vacca, Juanchi Wang, Mariagrazia Graziano, Massimo Ruo Roch, Maurizio Zamboni:
Feedbacks in QCA: A Quantitative Approach. IEEE Trans. Very Large Scale Integr. Syst. 23(10): 2233-2243 (2015) - [c46]D. Pala, Giovanni Causapruno, Marco Vacca, Fabrizio Riente, Giovanna Turvani, Mariagrazia Graziano, Maurizio Zamboni:
Logic-in-Memory architecture made real. ISCAS 2015: 1542-1545 - [c45]Mario Cofano, Giulia Santoro, Marco Vacca, D. Pala, Giovanni Causapruno, Fabrizio Cairo, Fabrizio Riente, Giovanna Turvani, Massimo Ruo Roch, Mariagrazia Graziano, Maurizio Zamboni:
Logic-in-Memory: A Nano Magnet Logic Implementation. ISVLSI 2015: 286-291 - 2014
- [j25]Maurizio Martina, Carlo Condo, Guido Masera, Maurizio Zamboni:
A Joint Source/Channel Approach to Strengthen Embedded Programmable Devices against Flash Memory Errors. IEEE Embed. Syst. Lett. 6(4): 77-80 (2014) - [j24]Xiaolu Guo, Mario R. Casu, Mariagrazia Graziano, Maurizio Zamboni:
Simulation and design of an UWB imaging system for breast cancer detection. Integr. 47(4): 548-559 (2014) - [j23]Stefano Frache, Mariagrazia Graziano, Maurizio Zamboni:
Nanoarray architectures multilevel simulation. ACM J. Emerg. Technol. Comput. Syst. 10(1): 6:1-6:20 (2014) - [j22]Stefano Frache, Diego Chiabrando, Mariagrazia Graziano, Marco Vacca, Luca Boarino, Maurizio Zamboni:
Enabling design and simulation of massive parallel nanoarchitectures. J. Parallel Distributed Comput. 74(6): 2530-2541 (2014) - [j21]Mario R. Casu, Francesco Colonna, Marco Crepaldi, Danilo Demarchi, Mariagrazia Graziano, Maurizio Zamboni:
UWB microwave imaging for breast cancer detection: Many-core, GPU, or FPGA? ACM Trans. Embed. Comput. Syst. 13(3s): 109:1-109:22 (2014) - [c44]Giovanna Turvani, A. Tohti, Matteo Bollo, Fabrizio Riente, Marco Vacca, Mariagrazia Graziano, Maurizio Zamboni:
Physical design and testing of Nano Magnetic architectures. DTIS 2014: 1-6 - [c43]Gianvito Urgese, Giulia Paciello, Andrea Acquaviva, Elisa Ficarra, Mariagrazia Graziano, Maurizio Zamboni:
Dynamic Gap Selector: A Smith Waterman Sequence Alignment Algorithm with Affine Gap Model Optimization. IWBBIO 2014: 1347-1358 - [c42]Davide Giri, Marco Vacca, Giovanni Causapruno, Wenjing Rao, Mariagrazia Graziano, Maurizio Zamboni:
A standard cell approach for MagnetoElastic NML circuits. NANOARCH 2014: 65-70 - [c41]Pasquale Ranone, Giovanna Turvani, Fabrizio Riente, Mariagrazia Graziano, Massimo Ruo Roch, Maurizio Zamboni:
Fault tolerant nanoarray circuits: Automatic design and verification. VTS 2014: 1-6 - [p3]Marco Vacca, Mariagrazia Graziano, Alessandro Chiolerio, Andrea Lamberti, Marco Laurenti, Davide Balma, Emanuele Enrico, Federica Celegato, Paola Tiberto, Luca Boarino, Maurizio Zamboni:
Electric Clock for NanoMagnet Logic Circuits. Field-Coupled Nanocomputing 2014: 73-110 - [p2]Marco Vacca, Mariagrazia Graziano, Juanchi Wang, Fabrizio Cairo, Giovanni Causapruno, Gianvito Urgese, Andrea Biroli, Maurizio Zamboni:
NanoMagnet Logic: An Architectural Level Overview. Field-Coupled Nanocomputing 2014: 223-256 - [p1]Marco Vacca, Stefano Frache, Mariagrazia Graziano, Fabrizio Riente, Giovanna Turvani, Massimo Ruo Roch, Maurizio Zamboni:
ToPoliNano: NanoMagnet Logic Circuits Design and Simulation. Field-Coupled Nanocomputing 2014: 274-306 - 2013
- [j20]Mariagrazia Graziano, Stefano Frache, Maurizio Zamboni:
A Hardware Viewpoint on Biosequence Analysis: What's Next? ACM J. Emerg. Technol. Comput. Syst. 9(4): 29:1-29:21 (2013) - [j19]Manoj Kumar Yadav, Mario R. Casu, Maurizio Zamboni:
LAURA-NoC: Local Automatic Rate Adjustment in Network-on-Chips With a Simple DVFS. IEEE Trans. Circuits Syst. II Express Briefs 60-II(10): 647-651 (2013) - [j18]Marco Vacca, Mariagrazia Graziano, Maurizio Zamboni:
Nanomagnetic Logic Microprocessor: Hierarchical Power Model. IEEE Trans. Very Large Scale Integr. Syst. 21(8): 1410-1420 (2013) - [j17]Francesco Colonna, Mariagrazia Graziano, Mario Roberto Casu, Xiaolu Guo, Maurizio Zamboni:
Hardware Acceleration of Beamforming in a UWB Imaging Unit for Breast Cancer Detection. VLSI Design 2013: 861691:1-861691:11 (2013) - [c40]Juanchi Wang, Marco Vacca, Mariagrazia Graziano, Massimo Ruo Roch, Maurizio Zamboni:
Biosequences analysis on NanoMagnet Logic. ICICDT 2013: 131-134 - [c39]Xiaolu Guo, Mario R. Casu, Mariagrazia Graziano, Maurizio Zamboni:
Breast cancer detection based on an UWB imaging system: Receiver design and simulations. ICICDT 2013: 167-170 - [c38]D. Changdao, Mariagrazia Graziano, Ernesto Sánchez, Matteo Sonza Reorda, Maurizio Zamboni, N. Zhifan:
On the functional test of the BTB logic in pipelined and superscalar processors. LATW 2013: 1-6 - [c37]Marco Vacca, Stefano Frache, Mariagrazia Graziano, L. Di Crescenzo, Fabrizio Cairo, Maurizio Zamboni:
Automatic Place&Route of Nano-magnetic Logic circuits. NANOARCH 2013: 58-63 - [c36]Xiaolu Guo, Mario R. Casu, Mariagrazia Graziano, Maurizio Zamboni:
UWB receiver for breast cancer detection: Comparison between two different approaches. SoCC 2013: 55-60 - 2012
- [c35]Manoj Kumar Yadav, Mario R. Casu, Maurizio Zamboni:
DVFS Based on Voltage Dithering and Clock Scheduling for GALS Systems. ASYNC 2012: 118-125 - [c34]Gianvito Urgese, Mariagrazia Graziano, Marco Vacca, Muhammad Awais, Stefano Frache, Maurizio Zamboni:
Protein alignment HW/SW optimizations. ICECS 2012: 145-148 - [c33]Stefano Frache, Diego Chiabrando, Mariagrazia Graziano, Fabrizio Riente, Giovanna Turvani, Maurizio Zamboni:
ToPoliNano: nanoarchitectures design made real. NANOARCH 2012: 160-167 - 2011
- [j16]Mariagrazia Graziano, Marco Vacca, Davide Blua, Maurizio Zamboni:
Asynchrony in Quantum-Dot Cellular Automata Nanocomputation: Elixir or Poison? IEEE Des. Test Comput. 28(5): 72-83 (2011) - [j15]Marco Vacca, Mariagrazia Graziano, Maurizio Zamboni:
Asynchronous Solutions for Nanomagnetic Logic Circuits. ACM J. Emerg. Technol. Comput. Syst. 7(4): 15:1-15:18 (2011) - [j14]Mario R. Casu, Massimo Ruo Roch, Sergio Tota, Maurizio Zamboni:
A NoC-based hybrid message-passing/shared-memory approach to CMP design. Microprocess. Microsystems 35(2): 261-273 (2011) - [c32]Stefano Frache, Luca Gaetano Amarù, Mariagrazia Graziano, Maurizio Zamboni:
Nanofabric power analysis: Biosequence alignment case study. NANOARCH 2011: 91-98 - 2010
- [c31]Sergio Tota, Mario R. Casu, Massimo Ruo Roch, Luca Rostagno, Maurizio Zamboni:
MEDEA: a hybrid shared-memory/message-passing multiprocessor NoC-based architecture. DATE 2010: 45-50 - [c30]Stefano Frache, Mariagrazia Graziano, Maurizio Zamboni:
A flexible simulation methodology and tool for nanoarray-based architectures. ICCD 2010: 60-67
2000 – 2009
- 2009
- [j13]Mario R. Casu, Mariagrazia Graziano, Maurizio Zamboni:
A Fully Differential Digital CMOS UWB Pulse Generator. Circuits Syst. Signal Process. 28(5): 649-664 (2009) - [j12]Marco Crepaldi, Mario R. Casu, Mariagrazia Graziano, Maurizio Zamboni:
A mixed-signal demodulator for a low-complexity IR-UWB receiver: Methodology, simulation and design. Integr. 42(1): 47-60 (2009) - [j11]Sergio Tota, Mario R. Casu, Massimo Ruo Roch, Luca Macchiarulo, Maurizio Zamboni:
A Case Study for NoC-Based Homogeneous MPSoC Architectures. IEEE Trans. Very Large Scale Integr. Syst. 17(3): 384-388 (2009) - 2007
- [c29]Marco Crepaldi, Mario R. Casu, Mariagrazia Graziano, Maurizio Zamboni:
An effective AMS top-down methodology applied to the design of a mixed-signal UWB system-on-chip. DATE 2007: 1424-1429 - [c28]Sergio Tota, Mario R. Casu, Paolo Motto Ros, Massimo Ruo Roch, Maurizio Zamboni:
The NoCRay Graphic Accelerator: a Case-study for MP-SoC Network-on-Chip Design Methodology. SoC 2007: 1-4 - [c27]Sergio Tota, Mario R. Casu, Paolo Motto Ros, Massimo Ruo Roch, Maurizio Zamboni:
A methodology and a case-study for network-on-chip based MP-SoC architectures. Nano-Net 2007: 9 - 2004
- [j10]Mariagrazia Graziano, Mario R. Casu, Guido Masera, Gianluca Piccinini, Maurizio Zamboni:
Effects of temperature in deep-submicron global interconnect optimization in future technology nodes. Microelectron. J. 35(10): 849-857 (2004) - [j9]Mario R. Casu, Mariagrazia Graziano, Guido Masera, Gianluca Piccinini, Maurizio Zamboni:
An electromigration and thermal model of power wires for a priori high-level reliability prediction. IEEE Trans. Very Large Scale Integr. Syst. 12(4): 349-358 (2004) - 2003
- [j8]Mario R. Casu, Mariagrazia Graziano, Guido Masera, Gianluca Piccinini, Maurizio Zamboni:
Coupled electro-thermal modeling and optimization of clock networks. Microelectron. J. 34(12): 1175-1185 (2003) - [j7]Maurizio Martina, Guido Masera, Gianluca Piccinini, Maurizio Zamboni:
Novel JPEG 2000 Compliant DWT and IWT VLSI Implementations. J. VLSI Signal Process. 35(2): 137-153 (2003) - [c26]Federico Quaglio, Maurizio Martina, Fabrizio Vacca, Guido Masera, Andrea Molino, Gianluca Piccinini, Maurizio Zamboni:
Wireless sensor networks: a power-scalable motion estimation IP for hybrid video coding. FPGA 2003: 246 - [c25]Mario R. Casu, Mariagrazia Graziano, Gianluca Piccinini, Guido Masera, Maurizio Zamboni:
Effects of Temperature in Deep-Submicron Global Interconnect Optimization. PATMOS 2003: 90-100 - [c24]M. Addino, Mario R. Casu, Guido Masera, Gianluca Piccinini, Maurizio Zamboni:
A Block-Based Approach for SoC Global Interconnect Electrical Parameters Characterization. PATMOS 2003: 121-130 - 2002
- [j6]Guido Masera, Marco Mazza, Gianluca Piccinini, Fabrizio Viglione, Maurizio Zamboni:
Architectural strategies for low-power VLSI turbo decoders. IEEE Trans. Very Large Scale Integr. Syst. 10(3): 279-285 (2002) - [c23]Maurizio Martina, Guido Masera, Gianluca Piccinini, Fabrizio Vacca, Maurizio Zamboni:
Energy Evaluation on a Reconfigurable, Multimedia-Oriented Wireless Sensor. FPL 2002: 332-339 - [c22]Maurizio Martina, Guido Masera, Gianluca Piccinini, Fabrizio Vacca, Maurizio Zamboni:
Reconfigurable DSP IP for multimedia applications. ICASSP 2002: 4179 - [c21]Maurizio Martina, Guido Masera, Gianluca Piccinini, Fabrizio Vacca, Maurizio Zamboni:
System architecture for error-resilient, embedded JPEG2000 wireless delivery. DSP 2002: 211-218 - [c20]Maurizio Martina, Guido Masera, Gianluca Piccinini, Fabrizio Vacca, Maurizio Zamboni:
Embedded IWT evaluation in reconfigurable wireless sensor network. ICECS 2002: 855-858 - [c19]Mario R. Casu, Mariagrazia Graziano, Guido Masera, Gianluca Piccinini, M. M. Prono, Maurizio Zamboni:
Clock Distribution Network Optimization under Self-Heating and Timing Constraints. PATMOS 2002: 198-208 - 2001
- [c18]Maurizio Martina, Guido Masera, Gianluca Piccinini, Fabrizio Vacca, Maurizio Zamboni:
JPEG 2000: finite precision representation and hardware implications. ICECS 2001: 875-878 - [c17]Maurizio Martina, Guido Masera, Gianluca Piccinini, Fabrizio Vacca, Maurizio Zamboni:
Reconfigurable coprocessor based JPEG 2000 implementation. ICECS 2001: 1227-1230 - [c16]Mario R. Casu, Gianluca Piccinini, Guido Masera, Maurizio Zamboni:
Synthesis of low-leakage PD-SOI circuits with body-biasing. ISLPED 2001: 287-290 - [c15]Mariagrazia Graziano, Guido Masera, Gianluca Piccinini, Maurizio Zamboni:
Hierarchical power supply noise evaluation for early power grid design prediction. SLIP 2001: 183-188 - [c14]Marco Delaurenti, Mariagrazia Graziano, Guido Masera, Gianluca Piccinini, Maurizio Zamboni:
Switching Noise Analysis Framework For High Speed Logic Families. VLSI Design 2001: 524-530 - 2000
- [c13]Fabrizio Viglione, Guido Masera, Gianluca Piccinini, Massimo Ruo Roch, Maurizio Zamboni:
A 50 Mbit/s Iterative Turbo-Decoder. DATE 2000: 176-180 - [c12]Mario Roberto Casu, Guido Masera, Gianluca Piccinini, Massimo Ruo Roch, Maurizio Zamboni:
A high accuracy-low complexity model for CMOS delays. ISCAS 2000: 455-458 - [c11]Mariagrazia Graziano, Marco Delaurenti, Guido Masera, Gianluca Piccinini, Maurizio Zamboni:
Noise Safety Design Methodologies. ISQED 2000: 157- - [c10]Mariagrazia Graziano, Marco Delaurenti, Maurizio Zamboni:
Power supply design parameters prediction for high performance IC design flows. SLIP 2000: 61-67
1990 – 1999
- 1999
- [j5]Guido Masera, Gianluca Piccinini, Massimo Ruo Roch, Maurizio Zamboni:
VLSI architectures for turbo codes. IEEE Trans. Very Large Scale Integr. Syst. 7(3): 369-379 (1999) - [c9]Guido Masera, Gianluca Piccinini, Massimo Ruo Roch, Maurizio Zamboni:
A Quantitative Approach to the Design of an Optimized Hardware Interpreter for Java Byte-Code. Applied Informatics 1999: 51-54 - [c8]Guido Masera, Gianluca Piccinini, Massimo Ruo Roch, Maurizio Zamboni:
New 2 Gbit/s CMOS I/O pads. Great Lakes Symposium on VLSI 1999: 82-85 - [c7]Marco Delaurenti, Mariagrazia Graziano, Guido Masera, Gianluca Piccinini, Maurizio Zamboni:
A global optimization tool for CMOS logic circuits. ICECS 1999: 1671-1674 - 1998
- [c6]A. Brizio, Guido Masera, Gianluca Piccinini, Massimo Ruo Roch, Maurizio Zamboni:
A 500 MHz 2d-DWT VLSI processor. EUSIPCO 1998: 1-4 - [c5]Pierre Combelles, Christophe Del Toso, Dietmar Hepper, David Le Goff, J. J. Ma, Patrick Robertson, Fabio Scalise, Laurent Soyer, Maurizio Zamboni:
A receiver architecture conforming to the OFDM based digital video broadcasting standard for terrestrial transmission (DVB-T). ICC 1998: 780-785 - [c4]Pasquale Cocchini, Massoud Pedram, Gianluca Piccinini, Maurizio Zamboni:
Fanout optimization under a submicron transistor-level delay model. ICCAD 1998: 551-556 - 1997
- [j4]Pasquale Cocchini, Gianluca Piccinini, Maurizio Zamboni:
A comprehensive submicrometer MOST delay model and its application to CMOS buffers. IEEE J. Solid State Circuits 32(8): 1254-1262 (1997) - 1996
- [c3]F. Fraternali, Guido Masera, Gianluca Piccinini, Maurizio Zamboni:
A 650 MHz pipelined MAC for DSP applications using a new clocking strategy. EUSIPCO 1996: 1-4 - 1995
- [c2]Pierre Plaza, Juan Carlos Diaz, Fermín Calvo, Luis A. Merayo, Maurizio Zamboni, Pietro Scarfone, Marco Barbini:
Input and output processor for an ATM high speed switch (2.5 Gb/s): the CMC. ED&TC 1995: 162-166 - 1992
- [j3]Guido Albertengo, Pierluigi Civera, Renato Lo Cigno, Gianluca Piccinini, Maurizio Zamboni, Flaminio Borgonovo, Luigi Fratta, Giuseppe Panizzardi:
Deflection network: Principles, implementation, services. Eur. Trans. Telecommun. 3(2): 195-206 (1992)
1980 – 1989
- 1989
- [j2]Pierluigi Civera, Gianluca Piccinini, Maurizio Zamboni:
Implementation studies for a VLSI Prolog coprocessor. IEEE Micro 9(1): 10-23 (1989) - 1987
- [j1]Pierluigi Civera, Gianluca Piccinini, Maurizio Zamboni:
Design considerations on a VLSI Prolog interpreter. Microprocess. Microprogramming 21(1-5): 267-273 (1987) - [c1]Pierluigi Civera, Franco Maddaleno, Gianluca Piccinini, Maurizio Zamboni:
An Experimental VLSI Prolog Interpreter: Preliminary Measurements and Results. ISCA 1987: 117-126
Coauthor Index
Mario R. Casu
aka: Mario Roberto Casu
aka: Mario Roberto Casu
[j36] [j35] [c51] [j34] [c49] [j33] [j32] [j31] [j30] [j29] [c47] [j28] [j27] [j26] [c46] [c45] [j24] [j23] [j22] [j21] [c44] [c43] [c42] [c41] [p3] [p2] [p1] [j20] [j18] [j17] [c40] [c39] [c38] [c37] [c36] [c34] [c33] [j16] [j15] [c32] [c30] [j13] [j12] [c29] [j10] [j9] [j8] [c25] [c19] [c15] [c14] [c11] [c10] [c7]
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