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ORCID6. MBMV 2003: Bremen, Germany
- Rolf Drechsler:
Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), Bremen, Germany, February 24-25, 2003. Shaker 2003 - Jan Peleska:
Automated Test Suites for Modern Aircraft Controllers. MBMV 2003: 1-10 - Michael Kersten, Ramon Biniasch, Wolfgang Nebel, Frank Oppenheimer:
Erweiterung der UML um Zeitannotationen zur Analyse des Zeitverhaltens reaktiver Systeme. MBMV 2003: 11-20 - Marco Fischer, Stefan Förster, André Windisch, Burkhard Balser, Dieter Monjau:
A New Process-Algebraic Specification Methodology for Integrated Modular Avionic Systems. MBMV 2003: 21-29 - Joachim Haase:
Regeln für die Erstellung von VHDL-AMS-Modellen. MBMV 2003: 30-40 - Christian Meise, Christoph Grimm:
Konzept einer Klassensammlung zur Verhaltensmodellierung hybrider Systeme am Beispiel der Leistungselektronik. MBMV 2003: 41-50 - Stefan Ihmor, Markus Visarius, Wolfram Hardt:
Modeling of Configurable HW/SW-Interfaces. MBMV 2003: 51-60 - Hans-Jürgen Brand:
Verifikation von Prozessorplattformen -- Probleme und Trends aus Sicht der Chipentwicklung. MBMV 2003: 61-61 - Mathias Sporer, Dieter Monjau:
Datenbanken zur konsistenten Speicherung von Entwurfsdaten für eingebettete Systeme. MBMV 2003: 62-71 - Matthias Menge, Carsten Gremzow, Irenäus Schoppa:
laLa -- An Object Oriented Language for Schematic and Printed Circuit Board Specification. MBMV 2003: 72-80 - Fanny Garnier, Wolfgang Ecker:
Incremental Design: A VHDL based Case Study. MBMV 2003: 81-92 - Christoph Jaeschke, Bodo Hoppe, Wolfram Sauer:
A Universal Disassembler using Table Based Formal Architectural Specification. MBMV 2003: 93-101 - Marek Jersak, Kai Richter, Rolf Ernst, Jörn-Christian Braam, Zheng-Yu Jiang, Fabian Wolf:
Certifiable Software-Integration for Engine Electronics. MBMV 2003: 102-111 - Viktor K. Sabelfeld, Kai Kapp:
Arithmetic in Formal Synthesis. MBMV 2003: 112-120 - Kai Kapp, Viktor K. Sabelfeld:
Dead Code Elimination in Formal Synthesis. MBMV 2003: 121-130 - Michael Payer:
A Platform for Construction and Integration of Digital IP Blocks. MBMV 2003: 131-131 - Roberto Ziller, Klaus Schneider:
A μ-Calculus Approach to Supervisor Synthesis. MBMV 2003: 132-143 - Carsten Gremzow, E. Hansen, Nico Moser, Hans-Ulrich Post:
Datapath constrained High-Level Synthesis of Central Memory Architectures. MBMV 2003: 144-153 - Marco Beyer, Hans-Ulrich Post:
VHDL-Hardware/Software-Board-Level-Simulation innerhalb eines FPGA/DSP-Entwicklungssystems. MBMV 2003: 154-163 - Ilia Polian, Wolfgang Günther, Bernd Becker:
The Case for 2-POF. MBMV 2003: 164-173 - Martin Zambaldi, Matthias Bauer, Wolfgang Ecker, Renate Henftling, Andreas Zinn:
An Enhanced Environment for Multi-Level Simulation. MBMV 2003: 174-183 - Klaus Winkelmann, Hans-Joachim Trylus, Dominik Stoffel, Görschwin Fey:
Cost-efficient Formal Block Verification for ASIC Design. MBMV 2003: 184-188 - Marc Herbstritt, Bernd Becker:
Conflict-based Selection of Branching Rules in SAT-Algorithms. MBMV 2003: 189-198 - Markus Wedler, Dominik Stoffel, Wolfgang Kunz:
Towards the impact of state encoding on induction-based property checking. MBMV 2003: 199-208 - Jürgen Ruf, Prakash Mohan Peranandam:
Bounded Property Checking with Symbolic Simulation. MBMV 2003: 209-218 - Alexander Krupp, Wolfgang Müller:
Formale Verfeinerung und Modelchecking von zeitbehafteten endlichen Automaten. MBMV 2003: 219-228 - Daniel Große, Rolf Drechsler:
Formale Verifikation von LTL-Formeln für SystemC-Beschreibungen. MBMV 2003: 229-238 - Eva Fordran, Matthias Fruth, Ulrich Hensel, Hu Shaoyu, Madabhushi Srinivasan:
Model Checking in an Industrial Environment. MBMV 2003: 239-248
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