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ORCID26th ISQED 2025: San Francisco, CA, USA
- 26th International Symposium on Quality Electronic Design, ISQED 2025, San Francisco, CA, USA, April 23-25, 2025. IEEE 2025, ISBN 979-8-3315-0942-2
- Archisman Ghosh, Debarshi Kundu, Avimita Chatterjee, Swaroop Ghosh:
Guardians of the Quantum GAN. 1-8 - Ananna Biswas, Md Akhtaruzzaman, Hongyu An
:
Energy-Efficient Neuromorphic Closed-Loop Modulation System for Parkinson's Disease. 1-7 - Srinivasaraghavan Krishnamoorthy:
Leveraging Generative AI for Platform Hardware Design Automation - Learnings and Recommendations. 1-4 - Hasita Veluri, Dilip Vasudevan:
An Error-Resilient Compute-in-Memory 3D FPCA Architecture for High-Performance Floating-Point Operations. 1-9 - Ning Miao, Chongzhou Fang, Ruijie Fang, Ruoyu Zhang, Mahdi Eslamimehr, Setareh Rafatirad, Hossein Sayadi, Houman Homayoun:
Navigating the Trilemma: Security, Power, and Performance Trade-Offs in Bluetooth Low Energy. 1-8 - Zhenkun Yang, Suvadeep Banerjee, Jeremy Casas, Jin Yang:
Formal Verification of a Custom Compiler for a Fully Homomorphic Encryption Accelerator. 1-7 - Kevin Immanuel Gubbi, Mohammadnavid Tarighat, Arvind Sudarshan, Inderpreet Kaur, Pavan Dheeraj Kota, Avesta Sasan, Houman Homayoun:
State of Hardware Fuzzing: Current Methods and the Potential of Machine Learning and Large Language Models. 1-7 - Carson Sobolewski, David Selasi Koblah, Domenic Forte:
A Framework for PCB Design File Reconstruction from X-Ray CT Annotations. 1-8 - Kemal Çaglar Coskun, Chandan Kumar Jha, Muhammad Hassan, Rolf Drechsler:
Formal Verification of Error Bounds for Resistive-Switching-Based Multilevel Matrix-Vector Multipliers. 1-8 - Majid Nezarat, Erfan Khedersolh, Hadi Shahriar Shahhoseini, Amin Rezaei:
ML-Based Real-Time URL Inspection with Hardware Acceleration for Enhanced Web Security. 1-6 - Pruthvi Parate, Alwin Shaju, Sanampudi Gopala Krishna Reddy, D. R. Vasanthi, Madhav Rao:
Non-Homogeneous Composite Karatsuba Multipliers Factored Hardware-Efficient ECDSA Generation and Verification Accelerator Units. 1-7 - Ahmed Mamdouh, Dayane Reis:
HIDE: A Hyperdimensional In-DRAM Encoder for Fast and Energy-Efficient Classification. 1-7 - Shyamala Palanisamy, Wei Wei, Mimi Xie:
Energy-Efficient Persistently Secure Block-Based Differential Checkpointing for Energy Harvesting Devices. 1-6 - Prabhat Mishra:
Adversarial Assertions. 1-8 - Suryansh Upadhyay, Swaroop Ghosh:
Quantum Quandaries: Unraveling Encoding Vulnerabilities in Quantum Neural Networks. 1-7 - Romina Aalishah, Mozhgan Navardi, Tinoosh Mohsenin:
MambaLiteSR: Image Super-Resolution with Low-Rank Mamba Using Knowledge Distillation. 1-8 - Yueting Li, Xingyu Ni, Sara Achour, Boris Murmann:
Open-ALOE: An Analog Layout Automation Flow for the Open-Source Ecosystem. 1-6 - Mengdi Zhu, Ronald Wilson, Reiner N. Dizon-Paradis, Olivia P. Dizon-Paradis, Domenic J. Forte, Damon L. Woodard:
Genetic Algorithm-Assisted Golden-Free Standard Cell Library Extraction from SEM Images. 1-8 - Lennart M. Reimann, Evgenii Rezunov, Dominik Germek, Luca Collini, Christian Pilato, Ramesh Karri, Rainer Leupers:
The Impact of Logic Locking on Confidentiality: An Automated Evaluation. 1-8 - Anees Rehman, Vincent Langford, Jayden John, Yuntao Liu:
OPAQUE: Obfuscating Phase in Quantum Circuit Compilation for Efficient IP Protection. 1-6 - Kanish R, Madhav Rao:
XORed Carry Chain Ring Oscillator Factored True Random Number Generator. 1-7 - Subroto Kumer Deb Nath, Benjamin Tan:
Toward Automated Potential Primary Asset Identification in Verilog Designs. 1-7 - Abdelrahman Elnaggar, Benjamin Tan:
Adding Context to LLM-Guided Verilog Repair. 1-7 - Yuhao Liu, Salim Ullah, Akash Kumar:
Bitwise Systolic Array Architecture for Runtime-Reconfigurable Multi-Precision Quantized Multiplication on Hardware Accelerators. 1-9 - Xiuyan Zhang, Shantanu Dutt:
A Max Weighted-Matching Based Non-Greedy Post-HLS Power Gating Technique with Comprehensive Power Modeling. 1-9 - Rajanikant Sakariya, Subhadeep Aich, Vivek Joshi, Roger Griesmer:
Die Area Reduction by Decongesting Top Channels Using Novel Feedthrough Insertion Methodology in Hierarchical SoC Designs. 1-6 - En-Ming Huang, Yu-Fu Kao, Yan-Hong Lu, Chun-Yi Lee:
V-SYNC-Aware GPU DVFS Governor for Efficient Game Application Execution on Mobile Devices. 1-7 - Akash Sankhe, Mukul Lokhande, Radheshyam Sharma, Santosh Kumar Vishvakarma:
Area-Optimized 2D Interleaved Adder Tree Design for Sparse DCIM Edge Processing. 1-6 - Maliha Elma, Navya Goli, Umamaheswara Rao Tida:
Machine Learning Assisted Magnetic-Core Coupled Inductor Design for Interleaved Buck Converter. 1-8 - Bohan Wang, Zeyang Xu, Lingfeng Zhou, Huiyao Wang, Jinghai Wang, Zhiyi Yu, Shanlin Xiao:
A Time-Borrowing Method for High-Performance Bundled-Data Asynchronous Circuits. 1-6 - Parker Link, Benjamin Tan:
Evaluating LLM-Based Communicative Agents for Verilog Design. 1-8 - Sree Nirmillo Biswash Tushar, Sk Hasibul Alam, Graham Buchanan, Rocco Febbo, Hritom Das, Garrett S. Rose:
In-Memory Template Matching with Approximated PCC Computation Leveraging Memristive System. 1-8 - Chetan Kumar, Arijit Nath:
RECminThrash: Recency and Eviction Count Based Cache Replacement Policy to Minimize Thrashing at the Last Level Caches. 1 - Dantu Nandini Devi, Saketh Gajawada, Madhav Rao:
Design of Hardware-Efficient Inexact Multiplier Using Evolutionary Algorithm Factored by Multi-Variate Approximation. 1-8 - Suriya Srinivasan, Andrew Jones, Cameron Hingson, Gannon Darrach, Ranga Vemuri:
Assertion-Based Trojan Localization Using Iterative Path Sensitization. 1-8 - Tharini Suresh, Salma Afifi, Sudeep Pasricha:
PhotoGAN: Generative Adversarial Neural Network Acceleration with Silicon Photonics. 1-8 - Chun-Wei Chiu, Ting-Chi Wang:
A PPA- and Security-Aware Physical Design Flow. 1-8 - Srijeet Guha, Andrea Guerrieri:
Precision Unwound: Fine-Tuning Loop Unrolling for Energy-Efficient FPGA-Based PQC Using HLS. 1 - Masoud Heidary, Biresh Kumar Joardar:
Aging Attack on Systolic Array-Based AI Accelerators via NBTI-Induced Aging. 1 - Dantu Nandini Devi, Bindu G. Gowda, Madhav Rao:
Meta-Heuristic Optimization for Designing Error Diluted Weight Stationary Approximate Systolic Array Architecture. 1-8 - Sagar Satapathy, Dip Sankar Banerjee:
DAPP: Delay Aware Power Prediction. 1-8 - Yu-Min Lee, Shih-Chieh Hsu, Bo-Yi Tsai, Zong-Lin Lu:
MErBAG: Mesh Error Based Adaptive Grid Generation in System-Level Thermal Analysis. 1-8 - Ben Dong, Qian Wang:
Optimizing Post-Quantum Crypto Algorithms in Embedded IoT Systems. 1 - Mohammad Shahidzadeh, Behnam Ghavami, Steven J. E. Wilton, Lesley Shannon:
Automated Verilog Assertion Generation Using Fine-Tuned LLMs with Subtask-Specific Iterative Prompting. 1-7 - Mehdi Elahi, Mohamed R. Elshamy, Abdel-Hameed A. Badawy, Mahdi Fazeli, Ahmad Patooghy:
Matter: Multi-Stage Adaptive Thermal Trojan for Efficiency & Resilience Degradation. 1-8 - Li Yang, Sen Lin, Fan Zhang, Junshan Zhang, Deliang Fan:
Efficient Self-Supervised Continual Learning with Progressive Task-Correlated Layer Freezing. 1-8 - Sreetama Sarkar, Sumit Bam Shrestha, Yue Che, Leobardo Campos-Macias, Gourav Datta, Peter A. Beerel:
Region Masking to Accelerate Video Processing on Neuromorphic Hardware. 1-7 - Josh Li, Jianbin Huang, Michael B. Jiang, Kang Jun Bai:
Compressed CNN for Inferring Rapid RF Fingerprints Using Memristor Crossbar Array. 1-6 - Mira Hout, Rouwaida Kanj, Ahmed M. Eltawil, Mohammed E. Fouda:
Ternary-Valued Associative Processor Design. 1-10 - D. V. Bhargav, Dantu Nandini Devi, Rachana Kaparthi, Madhav Rao:
LibApprox: A Comprehensive Library for Performance Efficient Approximate Circuits. 1-7 - Yaoyun Zhou, Kavin Rajasekaran, Qian Wang:
Exploring Parallel Implementation of SPHINCS+ Using Advanced Vector Extensions (AVX) Sets. 1-8 - Andy Wolff, Avinash Karanth:
Illuminati: A Simulation Framework for Modeling and Evaluating Photonic Neural Networks. 1-7 - Anantha Kamath, Aditya Handur-Kulkarni, Himanshu Singh, Kanchan Manna:
Reinforcement Learning for Testtime Optimization in the Network-on-Chip based Systems. 1-7 - Sahidul Islam, Wei Wei, Jishnu Banerjee, Chen Pan:
Energy-Adaptive Checkpoint-Free Intermittent Inference for Low Power Energy Harvesting Systems. 1-7 - Priyanka Agarwal, Pruthvi Parate, Madhav Rao:
A Generalized Hardware-Efficient Gabor Wavelet Architecture for Medical Image Processing. 1-7 - Jayden John, Lakshman Golla, Qian Wang:
Stealthy Conditional Trojans in Quantum Circuits. 1-7 - Raghavendra Sesha Narayanacharyulu Chitroju Kodanda Saiayyappa, Tanvi Banerjee, Wen Zhang:
Efficient Object Detection from Fused RGB and IR Aerial Images Enhanced by Token Selection. 1-8 - Ataollah Saeed Monir, Navid Rezazadeh, John Gosson, Boris Vaisband:
Behavioral Model of Charge-Trap Transistors for Neuromorphic Systems. 1-6 - Avimita Chatterjee, Archisman Ghosh, Swaroop Ghosh:
Quantum Prometheus: Defying Overhead with Recycled Ancillas in Quantum Error Correction. 1-7 - Christian Brazeau:
Modular Approach for Controlling Multi-Agent Systems with Natural Language. 1-6 - Yu-Min Lee, Shun-Ping Huang, Ying-Hui Lin:
Therunet-SP: 2.5D IC Thermal Simulation Using U-Net Convolution and Scaling Procedure. 1-6 - Joonas Ahola, Sampo Sovio, Jan-Erik Ekberg:
Device Boot-Up Security Restoration with Post-Quantum Split-Key KEM. 1-8 - Fredo Chavez, Sourabh Khandelwal:
Deep Learning-Based ASM-ESD Forward I-V Parameter Extraction. 1 - Prosen Kirtonia, Shelby Williams, Prasanna Kawatkar, Kasem Khalil, Magdy A. Bayoumi:
Analysis of Short and Aging Faults in TSVs at the Physical Level with Parametric Variation. 1-6 - Zhangying He, Chelsea William Fernandes, Hossein Sayadi:
Obfuscation-Resistant Hardware Malware Detection: A Stacked Denoising Autoencoder Approach. 1-10 - Naman Kalra, Jaynarayan T. Tudu:
RL-Driven Fine-Grained Power Gating for Modern Processors Using Multi-Layer Perceptron Models. 1-6 - Aashish Kumar Tiwary, Saketh Gajawada, Jay Shah, Nanditha Rao:
LUTAccel: Look-up-Table Based Vector Systolic Accelerator on FPGAs. 1-7 - Pravin Chandran, Srinivas Bodapati, Hitesh Sharma:
A Comprehensive Approach to Characterizing $V_{T}$ Miscorrelation Derates for Physical Design and Timing Signoff. 1-7 - Teppei Kawamura, Yutaka Masuda, Tohru Ishihara:
Piecewise-Linear Approximation of Self-Attention and Its Accuracy-Aware Training for Area-Efficient Vision Transformer Inference Accelerator. 1-7 - Tarek Mohamed, Hussam Amrouch:
Accelerating Reliability Analysis for Aging and Self-Heating using Machine Learning. 1-6 - Kai-Po Hsu, Tsung-Han Lai, Yi-Ting Li, Wuqian Tang, Yun-Ju Lee, Yung-Chih Chen, Wen-Hsin Chiu, Chun-Yao Wang:
IMU-Based Motion Trajectory Reconstruction and Recognition with Dynamic Calibration on Embedded System Platform. 1-8 - Hanqiu Wang, Ruochen Dai, Tuba Yavuz, Xiaolong Guo, Orlando Arias, Dean Sullivan, Michael Lee, Honggang Yu, Siqi Dai, Domenic Forte, Shuo Wang:
Cross-Layer EM Fault Injection Assessment Framework. 1-8 - Paula Carolina Lozano Duarte, Aradhana Dube, Georgios Zervakis, Mehdi B. Tahoori, Sani R. Nassif:
Function Approximation Using Analog Building Blocks in Flexible Electronics. 1-7 - Wenhao Sun, Bing Li, Grace Li Zhang, Xunzhao Yin, Cheng Zhuo, Ulf Schlichtmann:
Paradigm-Based Automatic HDL Code Generation Using LLMs. 1-8 - Yicheng Song, Zeljko Zilic:
An FPGA-based Emulation Process for Dynamic Quantum Circuits. 1-8 - Sudam Maduranga Wasala, Jurre Wolff, Yixian Shen, Anuj Pathania, Clemens Grelck, Andy D. Pimentel:
Energy-Efficient QoS-Aware Scheduling for S-NUCA Many-Cores. 1-8 - Fabian Kreß, Julian Höfer, Qiushi Lin, Patrick Schmidt, Zhenhua Zhu, Yu Zhu, Tanja Harbaum, Yu Wang, Jürgen Becker:
Deep Neural Network Inference Partitioning in Embedded Hybrid Analog-Digital Systems. 1-8 - Ayesha Siddique, Khurram Khalil, Khaza Anuarul Hoque:
Explainable AI-Guided Efficient Approximate DNN Generation for Multi-Pod Systolic Arrays. 1-8 - Suryansh Upadhyay, Swaroop Ghosh:
Quantum Data Breach: Reusing Training Dataset by Untrusted Quantum Clouds. 1-7 - Ayesha Hassan, Aireen Amir Jalal, Asma Mahar, H. Alan Mantooth:
Notch filter based Readout Interface for Hall-effect sensors for DC and High-Frequency Currents. 1-5 - Junyan Li, Sam-Zaak Wong, Gwok-Waa Wan, Xi Wang, Jun Yang:
EDA-Debugger: An LLM-Based Framework for Automated EDA Runtime Issue Resolution. 1-7 - Archisman Ghosh, Swaroop Ghosh:
AI-Driven Reverse Engineering of QML Models. 1-7 - Oceane Destras, Felipe Gohring de Magalhaes, Sébastien Le Beux, Gabriela Nicolescu:
All-Optical Reconfigurable Activation Function Based on Saturable Absorption. 1-8 - Ruizhe Li, Muhammad Farhan Azmine, Gauri Sharma, Yang Yi:
Efficient Digital Architecture of Spiking Encoders for Neuromorphic Accelerators. 1-8 - Arijit Nath, Harsh Raj:
Exploiting the Presence of Abundant Zero Data to Improve NVM Lifespan. 1-6 - Qian Chen, Xiaofeng Yang, Shengli Lu:
Machine Learning-Based Pruning Algorithm of Partitioning Techniques for Circuit Simulation. 1-8 - Xinran Li:
Leveraging DDR5 RCDs for High-Speed DDR5 Protocol Analysis: A Novel Approach to RDIMM Testing. 1-8 - Oswa M. Amro, Sanapala Jaswanth, Sai Dishanth Banoth, Urbi Chatterjee:
i-Know what you Do: Privacy Evaluation of Apple Smartphones with Remote Acoustic Side-Channels. 1-8 - Grégoire Eggermann, Giovanni Ansaloni, David Atienza:
Keep All in Memory with Maxwell: A Near-SRAM Computing Architecture for Edge AI Applications. 1-7 - Aybars Yunusoglu, Dexter Le, Murat Isik, Karn Tiwari, Ismail Can Dikmen, Teoman Karadag:
Battery State of Health Estimation Using LLM Framework. 1-8 - Theodoros Trochatos, Christopher Kang, Frederic T. Chong, Jakub Szefer:
Exploration of Vulnerabilities of Fault-Tolerant Quantum Computing. 1-6 - Jincong Lu, Sachin Sachdeva, Yuxuan Lin, Sheldon X.-D. Tan:
Real-Time Thermal Map Characterization and Analysis for Commercial GPUs with AI Workloads. 1-8 - Songhan Zhang, Xianzeng Guo, Yaling Wang, Chao Wang, Bi Wang, Zhaohao Wang:
Robust and Efficient NAND-Like TST-MRAM with Parallel Write/Read Operations and Reconfigurable PUF Mode. 1-5 - Mehdi Amininasab, Mahdi Fazeli, Ahmad Patooghy:
Sharp-Edge: A Robust Edge Computing Solution Through Performance Monitoring Using Tiny Machine Learning. 1-7 - Seyed Hossein Hosseini, Mehrdad Nourani, Theo Smedes, Charvaka Duvvury:
Analysis of VF-TLP ESD Measurements Using Machine Learning. 1-8 - Yazan Baddour, Ava Hedayatipour, Amin Rezaei:
REDACTOR: eFPGA Redaction for DNN Accelerator Security. 1-8 - Seongmo An, Sangho Lee, Jinyoung Shin, Yue Ri Jeong, Seung Eun Lee:
Analysis of the Impact of LFSR Architecture on Accuracy of Stochastic Computing Processors. 1-5 - Hussein Fadlallah, Rouwaida Kanj, Basma Hajri:
A Novel Full Adder Design Using Hybrid Memristor Ratioed Logic. 1-8 - Ethan Chen, Junting Deng, Chia Jen Cheng, Jiachen Xu, John Kan, Yuyi Shen, Vanessa Chen:
Dynamic Partial Reconfiguration of FPGAs for Energy-Efficient Machine Learning Inference in IoT Systems. 1-5 - Dongjoo Seo, Changhoon Sung, Junseok Park, Ping-Xiang Chen, Bryan Donyanavard, Nikil D. Dutt:
SPEED: Scalable and Predictable EnhancEments for Data Handling in Autonomous Systems. 1-7 - Mahdi Hasanzadeh, Ebad Taheri, Jason Green, Abdolhossein Sarrafzadeh, Ahmad Patooghy:
FlexGuard: Dynamic Scoring & Stochastic Routing for Balanced Security-Performance in 3D NoCs. 1-8 - Sheng Lu, Zhenlin Pei, Liuting Shang, Sungyong Jung, Qilian Liang, Chenyun Pan:
Graphene-Based FPGA Design and Optimization at the 7nm FinFET Technology Node. 1-7 - Bardia Nadimi, Hao Zheng:
AutoFlows: Inferring Message Flows from System Communication Traces. 1-8 - Kai-Xiang Lin, Yu-Min Lee, Bo-Yi Tsai:
Thermal Model Extraction at Chip Boundaries for Thermal Simulation of Chip in a System. 1-6 - Subhadeep Aich, Rajanikant Sakariya, Vivek Joshi:
Efficient and Scalable Place and Route Methodology for Large-Scale Hierarchical Designs: Achieving Faster Turnaround Time and Predictability. 1-6 - Rouwaida Kanj:
Weighted Vertex Cover Using Disjoint Set Data Structures for the Memory Reconfiguration Problem. 1 - Alvi Ataur Khalil, Mohammad Ashiqur Rahman:
Rollguard: Defending RPC Manipulation Attacks in Optimistic Rollups with Graph ML. 1-8 - Rupshali Roy, Swaroop Ghosh:
Watermarking of Quantum Circuits. 1-7 - Meng Lian, Yushen Zhang, Mengchu Li, Tsun-Ming Tseng, Shejun Sun, Ulf Schlichtmann:
Obstacle-Aware Synthesis of the Bus Topology Considering Wire Length Minimization. 1-8 - Qijia Tang, Dinesh Pamunuwa, Roshan Weerasekera:
DT2HDL: A Binary Decision Tree to HDL Generation Tool. 1-8 - Pruthvi Parate, Alwin Shaju, D. R. Vasanthi, Madhav Rao:
Power and Area-Efficient ECC Processor with Sequential Recursive Polynomial Multiplier Implementation. 1-7 - Vasileios Pentsos, Spyros Tragoudas, Kiriti Nagesh Gowda, Mike Schmit:
Energy-Aware DNN Task Scheduling with Dynamic Batching and Frequency Adjustment. 1-8 - Arjun Sridhar, Chen-Chia Chang, Junyao Zhang, Yiran Chen:
Improving Routability Prediction via NAS Using a Smooth One-Shot Augmented Predictor. 1-8 - Koustubh Phalak, Archisman Ghosh, Swaroop Ghosh:
Optimizing Quantum Embedding using Genetic Algorithm for QML Applications. 1-9 - Xiaomeng Wang, Yang Yi:
R2CTA: Reinforcement Learning and Reservoir Computing based Chiplets TSV Assignment. 1-7 - Zhuorui Zhao, Ruidi Qiu, Ing-Chao Lin, Grace Li Zhang, Bing Li, Ulf Schlichtmann:
VRank: Enhancing Verilog Code Generation from Large Language Models via Self-Consistency. 1-7
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