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Publication search results
found 123 matches
- 1993
- Alauddin Alomary, Takeharu Nakata, Yoshimichi Honma, Masaharu Imai, Nobuyuki Hikichi:
An ASIP instruction set optimization algorithm with functional module sharing constraint. ICCAD 1993: 526-532 - Lawrence F. Arnstein, Donald E. Thomas:
A general consistency technique for increasing the controllability of high level synthesis tools. ICCAD 1993: 741-744 - R. Iris Bahar, Erica A. Frohm, Charles M. Gaona, Gary D. Hachtel, Enrico Macii, Abelardo Pardo, Fabio Somenzi:
Algebraic decision diagrams and their applications. ICCAD 1993: 188-191 - Florin Balasa, Francky Catthoor, Hugo De Man:
Exact evaluation of memory size for multi-dimensional signal processing systems. ICCAD 1993: 669-672 - Bulent Basaran, Rob A. Rutenbar, L. Richard Carley:
Latchup-aware placement and parasitic-bounded routing of custom analog cells. ICCAD 1993: 415-421 - Mark Beardslee, Alberto L. Sangiovanni-Vincentelli:
An algorithm for improving partitions of pin-limited multi-chip systems. ICCAD 1993: 378-385 - Peter A. Beerel, Jerry R. Burch, Teresa H.-Y. Meng:
Efficient verification of determinate speed-independent circuits. ICCAD 1993: 261-267 - Debashis Bhattacharya, Prathima Agrawal:
Boolean algebraic test generation using a distributed system. ICCAD 1993: 440-443 - K. Olav ten Bosch, Pieter van der Wolf, Peter Bingley:
A flow-based user interface for efficient execution of the design cycle. ICCAD 1993: 356-363 - Daniel Brand:
Verification of large synthesized designs. ICCAD 1993: 534-537 - Jerry R. Burch, David L. Dill, Elizabeth Wolf, Giovanni De Micheli:
Modeling hierarchical combinational circuits. ICCAD 1993: 612-617 - Timothy M. Burks, Karem A. Sakallah:
Min-max linear programming and the timing analysis of digital circuits. ICCAD 1993: 152-155 - Xuejun Cai, He Yie, Peter Osterberg, John Gilbert, Stephen D. Senturia, Jacob K. White:
A relaxation/multipole-accelerated scheme for self-consistent electromechanical analysis of complex 3-D microelectromechanical structures. ICCAD 1993: 283-286 - Robert J. Carragher, Chung-Kuan Cheng, Masahiro Fujita:
An efficient algorithm for the net matching problem. ICCAD 1993: 640-644 - Andrea Casotto:
Run-time requirement tracing. ICCAD 1993: 350-355 - Mi-Chang Chang, Jue-Hsien Chern, Ping Yang:
An accurate grid local truncation error for device simulation. ICCAD 1993: 275-282 - Edoardo Charbon, Enrico Malavasi, Alberto L. Sangiovanni-Vincentelli:
Generalized constraint generation for analog circuit design. ICCAD 1993: 408-414 - Kamal Chaudhary, Akira Onozawa, Ernest S. Kuh:
A spacing algorithm for performance enhancement and cross-talk reduction. ICCAD 1993: 697-702 - Chau-Shen Chen, Yu-Wen Tsay, TingTing Hwang, Allen C.-H. Wu, Youn-Long Lin:
Combining technology mapping and placement for delay-optimization in FPGA designs. ICCAD 1993: 123-127 - Julie Chen, Andrew T. Yang:
Style: a technology-independent approach to statistical design. ICCAD 1993: 210-214 - Chien-In Henry Chen, Joel T. Yuen:
Logic partitioning to pseudo-exhaustive test for BIST design. ICCAD 1993: 646-649 - Chih-Liang Eric Cheng, Ching-yen Ho:
SEFOP: a novel approach to data path module placement. ICCAD 1993: 178-181 - Eli Chiprout, Hansruedi Heeb, Michel S. Nakhla, Albert E. Ruehli:
Simulating 3-D retarded interconnect models using complex frequency hopping (CFH). ICCAD 1993: 66-72 - Gwan S. Choi, Ravishankar K. Iyer, Daniel G. Saab:
Fault behavior dictionary for simulation of device-level transients. ICCAD 1993: 6-9 - Dipanwita Roy Chowdhury, Supratik Chakraborty, B. Vamsi, B. Pal Chaudhuri:
Cellular automata based synthesis of easily and fully testable FSMs. ICCAD 1993: 650-653 - Weitong Chuang, Sachin S. Sapatnekar, Ibrahim N. Hajj:
A unified algorithm for gate sizing and clock skew optimization to minimize sequential circuit area. ICCAD 1993: 220-223 - Jason Cong, Yuzheng Ding:
Beyond the combinatorial limit in depth minimization for LUT-based FPGA designs. ICCAD 1993: 110-114 - Jason Cong, Kwok-Shing Leung:
Optimal wiresizing under the distributed Elmore delay model. ICCAD 1993: 634-639 - Miguel R. Corazao, Marwan A. Khalaf, Lisa M. Guerra, Miodrag Potkonjak, Jan M. Rabaey:
Instruction set mapping for performance optimization. ICCAD 1993: 518-521 - Peter Dahlgren, Peter Lidén:
Efficient modeling of switch-level networks containing undetermined logic node states. ICCAD 1993: 746-752
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retrieved on 2024-05-18 23:41 CEST from data curated by the dblp team
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