Остановите войну!
for scientists:
default search action
Search dblp
Full-text search
- > Home
Please enter a search query
- case-insensitive prefix search: default
e.g., sig matches "SIGIR" as well as "signal" - exact word search: append dollar sign ($) to word
e.g., graph$ matches "graph", but not "graphics" - boolean and: separate words by space
e.g., codd model - boolean or: connect words by pipe symbol (|)
e.g., graph|network
Update May 7, 2017: Please note that we had to disable the phrase search operator (.) and the boolean not operator (-) due to technical problems. For the time being, phrase search queries will yield regular prefix search result, and search terms preceded by a minus will be interpreted as regular (positive) search terms.
Author search results
no matches
Venue search results
no matches
Refine list
refine by author
- no options
- temporarily not available
refine by venue
- no options
- temporarily not available
refine by type
- no options
- temporarily not available
refine by access
- no options
- temporarily not available
refine by year
- no options
- temporarily not available
Publication search results
found 25 matches
- 2001
- Jorge E. Carrillo, Paul Chow:
The effect of reconfigurable units in superscalar processors. FPGA 2001: 141-150 - Gang Chen, Jason Cong:
Simultaneous logic decomposition with technology mapping in FPGA designs. FPGA 2001: 48-55 - Deming Chen, Jason Cong, Milos D. Ercegovac, Zhijun Huang:
Performance-driven mapping for CPLD architectures. FPGA 2001: 39-47 - Pawel Chodowiec, Po Khuon, Kris Gaj:
Fast implementations of secret-key block ciphers using mixed inner- and outer-round pipelining. FPGA 2001: 94-102 - Andreas Dandalis, Viktor K. Prasanna:
Configuration compression for FPGA-based embedded systems. FPGA 2001: 173-182 - Mike Estlick, Miriam Leeser, James Theiler, John J. Szymanski:
Algorithmic transformations in the implementation of K- means clustering on reconfigurable hardware. FPGA 2001: 103-110 - Janette Frigo, Maya B. Gokhale, Dominique Lavenier:
Evaluation of the streams-C C-to-FPGA compiler: an applications perspective. FPGA 2001: 134-140 - Peter Hallschmid, Steven J. E. Wilton:
Detailed routing architectures for embedded programmable logic IP cores. FPGA 2001: 69-74 - Wei-Je Huang, Edward J. McCluskey:
A memory coherence technique for online transient error recovery of FPGA configurations. FPGA 2001: 183-192 - Sinan Kaptanoglu, John East, Tim Garverick, Scott Hauck, Tavana Tavana, Steven Trimberger, Ronnie Vasishta:
Is marriage in the cards for programmable logic, microprocessors and ASICs? FPGA 2001: 111 - K. K. Lee, D. F. Wong:
LRoute: a delay minimal router for hierarchical CPLDs. FPGA 2001: 12-20 - Guy G. Lemieux, David M. Lewis:
Using sparse crossbars within LUT. FPGA 2001: 59-68 - Gerhard Lienhart, Reinhard Männer, Klaus-Henning Noffz, Ralf Lay:
An FPGA-based video compressor for H.263 compatible bit streams. FPGA 2001: 207-212 - John W. Lockwood, Naji Naufel, Jonathan S. Turner, David E. Taylor:
Reprogrammable network packet processing on the field programmable port extender (FPX). FPGA 2001: 87-93 - Pablo Moisset, Pedro C. Diniz, Joonseok Park:
Matching and searching analysis for parallel hardware implementation on FPGAs. FPGA 2001: 125-133 - Chandra Mulpuri, Scott Hauck:
Runtime and quality tradeoffs in FPGA placement and routing. FPGA 2001: 29-36 - Seetharaman Ramachandran, S. Srinivasan:
FPGA implementation of a novel, fast motion estimation algorithm for real-time video compression. FPGA 2001: 213-219 - Jörg Ritter, Paul Molitor:
A pipelined architecture for partitioned DWT based lossy image compression using FPGA's. FPGA 2001: 201-206 - Mike Sheng, Jonathan Rose:
Mixing buffers and pass transistors in FPGA routing architectures. FPGA 2001: 75-84 - Deshanand P. Singh, Stephen Dean Brown:
The case for registered routing switches in field programmable gate arrays. FPGA 2001: 161-169 - Amit Singh, Arindam Mukherjee, Malgorzata Marek-Sadowska:
Interconnect pipelining in a throughput-intensive FPGA architecture. FPGA 2001: 153-160 - Greg Snider, Barry Shackleford, Richard J. Carter:
Attacking the semantic gap between application programming languages and configurable hardware. FPGA 2001: 115-124 - Prasanna Sundararajan, Steve Guccione:
Run-Time defect tolerance using JBits. FPGA 2001: 193-198 - Steven J. E. Wilton:
A crosstalk-aware timing-driven router for FPGAs. FPGA 2001: 21-28 - Scott Hauck, Martine D. F. Schlag, Russell Tessier:
Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2001, Monterey, CA, USA, February 11-13, 2001. ACM 2001, ISBN 1-58113-341-3 [contents]
loading more results
failed to load more results, please try again later
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from , , and to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from .
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
retrieved on 2024-04-27 17:09 CEST from data curated by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint