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Publication search results
found 20 matches
- 1999
- Shuvra S. Bhattacharyya, Praveen K. Murthy, Edward A. Lee:
Synthesis of Embedded Software from Synchronous Dataflow Specifications. J. VLSI Signal Process. 21(2): 151-166 (1999) - Wolfgang Boßung, Sorin Alexander Huss, Stephan Klaus:
High-Level Embedded System Specifications Based on Process Activation Conditions. J. VLSI Signal Process. 21(3): 277-291 (1999) - Francky Catthoor:
Energy-Delay Efficient Data Storage and Transfer Architectures and Methodologies: Current Solutions and Remaining Problems. J. VLSI Signal Process. 21(3): 219-231 (1999) - William E. Dougherty, David J. Pursley, Donald E. Thomas:
Subsetting Behavioral Intellectual Property for Low Power ASIP Design. J. VLSI Signal Process. 21(3): 209-218 (1999) - Shousheng He, Mats Torkelson:
An Orthogonal Time-Frequency Extraction Approach to 2D Systolic Architecture for 1D DFT Computation. J. VLSI Signal Process. 21(1): 61-70 (1999) - Jeff Y. F. Hsieh, Teresa H.-Y. Meng:
Low-Power Parallel Video Compression Architecture for a Single-Chip Digital CMOS Camera. J. VLSI Signal Process. 21(3): 195-207 (1999) - M. Kivioja, Jouni Isoaho, L. Vänskä:
Design and Implementation of Viterbi Decoder with FPGAs. J. VLSI Signal Process. 21(1): 5-14 (1999) - Ding-Ming Kwai, Behrooz Parhami:
Scalability of Programmable FIR Digital Filters. J. VLSI Signal Process. 21(1): 31-35 (1999) - Tamal Mukherjee, Gary K. Fedder:
Hierarchical Mixed-Domain Circuit Simulation, Synthesis and Extraction Methodology for MEMS. J. VLSI Signal Process. 21(3): 233-249 (1999) - Andy Negoi, Stefan Bara, Jacques Zimmermann, Alain Guyot:
A Dedicated Circuit for Charged Particles Simulation Using the Monte Carlo Method. J. VLSI Signal Process. 21(2): 103-116 (1999) - Peter Rieder, Sven Simon, Christian V. Schimpfle:
Application Specific Efficient VLSI Architectures for Orthogonal Single- and Multiwavelet Transforms. J. VLSI Signal Process. 21(2): 77-90 (1999) - Manuel Sánchez, Juan López, Oscar G. Plata, María A. Trenas, Emilio L. Zapata:
An Efficient Architecture for the In-Place Fast Cosine Transform. J. VLSI Signal Process. 21(2): 91-102 (1999) - Asim Smailagic, Hugo De Man:
Guest Editors' Introduction. J. VLSI Signal Process. 21(3): 183-184 (1999) - Asim Smailagic, Daniel P. Siewiorek:
System Level Design as Applied to CMU Wearable Computers. J. VLSI Signal Process. 21(3): 251-263 (1999) - Hosahalli R. Srinivas, Keshab K. Parhi:
A Radix 2 Shared Division/Square Root Algorithm and its VLSI Architecture. J. VLSI Signal Process. 21(1): 37-60 (1999) - James E. Stine, Michael J. Schulte:
The Symmetric Table Addition Method for Accurate Function Approximation. J. VLSI Signal Process. 21(2): 167-177 (1999) - Valerie E. Taylor:
Guest Editor's Introduction. J. VLSI Signal Process. 21(2): 75 (1999) - Diederik Verkest, Julio Leao da Silva Jr., Chantal Ykman-Couvreur, Kris Croes, Miguel Miranda, Sven Wuytack, Francky Catthoor, Gjalt G. de Jong, Hugo De Man:
Matisse: A System-on-Chip Design Methodology Emphasizing Dynamic Memory Management. J. VLSI Signal Process. 21(3): 185-194 (1999) - Benjamin W. Wah, Zhe Wu:
Discrete Lagrangian Methods for Designing Multiplierless Two-Channel PR-LP Filter Banks. J. VLSI Signal Process. 21(2): 131-149 (1999) - Heebyung Yoon, Junwei Hou, Swapan K. Bhattacharya, Abhijit Chatterjee, Madhavan Swaminathan:
Fault Detection and Automated Fault Diagnosis for Embedded Integrated Electrical Passives. J. VLSI Signal Process. 21(3): 265-276 (1999)
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