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Publication search results
found 20 matches
- 2010
- Akila Gothandaraman, Gregory D. Peterson, G. Lee Warren, Robert J. Hinde, Robert J. Harrison:
A Pipelined and Parallel Architecture for Quantum Monte Carlo Simulations on FPGAs. VLSI Design 2010: 946486:1-946486:8 (2010) - Reza Hashemian:
Local Biasing and the Use of Nullator-Norator Pairs in Analog Circuits Designs. VLSI Design 2010: 297083:1-297083:12 (2010) - Boppana Lakshmi, A. S. Dhar:
CORDIC Architectures: A Survey. VLSI Design 2010: 794891:1-794891:19 (2010) - Parag K. Lala, Adam Mathews, James Patrick Parkerson:
An Approach for Implementing State Machines with Online Testability. VLSI Design 2010: 639747:1-639747:7 (2010) - JunKyu Lee
, Gregory D. Peterson
, Robert J. Harrison, Robert J. Hinde:
Implementation of Hardware-Accelerated Scalable Parallel Random Number Generators. VLSI Design 2010: 930821:1-930821:11 (2010) - Jianchao Lu, Baris Taskin
:
Post-CTS Delay Insertion. VLSI Design 2010: 451809:1-451809:9 (2010) - Bo Marr, Jason George, Brian P. Degnan
, David V. Anderson, Paul E. Hasler:
Error Immune Logic for Low-Power Probabilistic Computing. VLSI Design 2010: 460312:1-460312:9 (2010) - Usha Sandeep Mehta
, Kankar S. Dasgupta, Niranjan M. Devashrayee
:
Run-Length-Based Test Data Compression Techniques: How Far from Entropy and Power Bounds? - A Survey. VLSI Design 2010: 670476:1-670476:9 (2010) - Saumil G. Merchant, Gregory D. Peterson
:
Evolvable Block-Based Neural Network Design for Applications in Dynamic Environments. VLSI Design 2010: 251210:1-251210:25 (2010) - Tooraj Nikoubin, Poona Bahrebar, Sara Pouri, Keivan Navi, Vaez Iravani:
Simple Exact Algorithm for Transistor Sizing of Low-Power High-Speed Arithmetic Circuits. VLSI Design 2010: 264390:1-264390:17 (2010) - Kofi M. Odame, Paul E. Hasler:
Nonlinear Circuit Analysis via Perturbation Methods and Hardware Prototyping. VLSI Design 2010: 687498:1-687498:8 (2010) - Gregory D. Peterson, Ethan D. Farquhar, Benjamin J. Blalock:
Selected Papers from the Midwest Symposium on Circuits and Systems. VLSI Design 2010: 538454:1-538454:2 (2010) - Sergio Saponara
, Tommaso Baldetti, Luca Fanucci
:
A Cost-Effective 10-Bit D/A Converter for Digital-Input MOEMS Micromirror Actuation. VLSI Design 2010: 169079:1-169079:7 (2010) - Kamakshy Selvajyothi
, P. A. Janakiraman:
FPGA-Based Software Implementation of Series Harmonic Compensation for Single Phase Inverters. VLSI Design 2010: 512312:1-512312:14 (2010) - P. Sumathi, P. A. Janakiraman:
FPGA Implementation of an Amplitude-Modulated Continuous-Wave Ultrasonic Ranger Using Restructured Phase-Locking Scheme. VLSI Design 2010: 213043:1-213043:11 (2010) - Chandradevi Ulaganathan, Neena Nambiar, Kimberly Cornett, Robert L. Greenwell, Jeremy A. Yager, Benjamin S. Prothro, Kevin Tham, Suheng Chen, Richard S. Broughton, Guoyuan Fu, Benjamin J. Blalock, Charles L. Britton Jr., M. Nance Ericson, H. Alan Mantooth, Mohammad M. Mojarradi, Richard W. Berger, John D. Cressler:
A SiGe BiCMOS Instrumentation Channel for Extreme Environment Applications. VLSI Design 2010: 156829:1-156829:12 (2010) - Yao Xu, Ashok Kumar Srivastava, Ashwani K. Sharma:
Emerging Carbon Nanotube Electronic Circuits, Modeling, and Performance. VLSI Design 2010: 864165:1-864165:8 (2010) - Kumar Yelamarthi
, Chien-In Henry Chen:
Dynamic CMOS Load Balancing and Path Oriented in Time Optimization Algorithms to Minimize Delay Uncertainties from Process Variations. VLSI Design 2010: 230783:1-230783:13 (2010) - Jun Zhao, Yong-Bin Kim:
A Low-Power Digitally Controlled Oscillator for All Digital Phase-Locked Loops. VLSI Design 2010: 946710:1-946710:11 (2010) - Yan Zhu, U. Fat Chio, He Gong Wei, Sai-Weng Sin
, Seng-Pan U., Rui Paulo Martins:
Linearity Analysis on a Series-Split Capacitor Array for High-Speed SAR ADCs. VLSI Design 2010: 706548:1-706548:8 (2010)
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