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Publication search results
found 29 matches
- 2012
- Marcos K. Aguilera, Dahlia Malkhi, Keith Marzullo, Alessandro Panconesi, Andrzej Pelc, Roger Wattenhofer:
Announcing the 2012 Edsger W. Dijkstra prize in distributed computing. SIGARCH Comput. Archit. News 40(4): 1-2 (2012) - Thomas C. P. Chau, Wayne Luk, Peter Y. K. Cheung:
Roberts: reconfigurable platform for benchmarking real-time systems. SIGARCH Comput. Archit. News 40(5): 10-15 (2012) - Aniruddha Ghosh, Satrughna Singha, Amitabha Sinha:
A new architecture for FPGA implementation of a MAC unit for digital signal processors using mixed number system. SIGARCH Comput. Archit. News 40(2): 33-38 (2012) - Aniruddha Ghosh, Satrughna Singha, Amitabha Sinha:
"Floating point RNS": a new concept for designing the MAC unit of digital signal processor. SIGARCH Comput. Archit. News 40(2): 39-43 (2012) - Nishant Kumar Giri, Amitabha Sinha:
FPGA implementation of a novel architecture for performance enhancement of Radix-2 FFT. SIGARCH Comput. Archit. News 40(2): 28-32 (2012) - Mohd Nazrin Md. Isa, Khaled Benkrid, Thomas Clayton:
Efficient architecture and scheduling technique for pairwise sequence alignment. SIGARCH Comput. Archit. News 40(4): 26-31 (2012) - Ben H. H. Juurlink, Cor Meenderinck:
Amdahl's law for predicting the future of multicores considered harmful. SIGARCH Comput. Archit. News 40(2): 1-9 (2012) - Takeshi Kakimoto, Keisuke Dohi, Yuichiro Shibata, Kiyoshi Oguri:
Performance comparison of GPU programming frameworks with the striped Smith-Waterman algorithm. SIGARCH Comput. Archit. News 40(5): 70-75 (2012) - Kei Kinoshita, Daisuke Takano, Tomoyuki Okamura, Tetsuhiko Yao, Yoshiki Yamaguchi:
An augmented reality system with a coarse-grained reconfigurable device. SIGARCH Comput. Archit. News 40(5): 16-21 (2012) - Shiv Kumar, Seshadri Krishna Murthy, G. Varaprasad, S. Sivasathya:
Network load and traffic pattern on the capacity of wireless ad hoc networks. SIGARCH Comput. Archit. News 40(4): 10-25 (2012) - Colin Yu Lin, Hayden Kwok-Hay So:
Energy-efficient dataflow computations on FPGAs using application-specific coarse-grain architecture synthesis. SIGARCH Comput. Archit. News 40(5): 58-63 (2012) - Cheng Ling, Khaled Benkrid, Tsuyoshi Hamada:
High performance phylogenetic analysis on CUDA-compatible GPUs. SIGARCH Comput. Archit. News 40(5): 52-57 (2012) - Subhashis Maitra, Amitabha Sinha:
A new algorithm for computing triple-base number system. SIGARCH Comput. Archit. News 40(4): 3-9 (2012) - Jamshaid Sarwar Malik, Paolo Palazzari, Ahmed Hemani:
Effort, resources, and abstraction vs performance in high-level synthesis: finding new answers to an old question. SIGARCH Comput. Archit. News 40(5): 64-69 (2012) - Conrad Mueller:
Axiom based architecture. SIGARCH Comput. Archit. News 40(2): 10-17 (2012) - Hiroki Nakahara, Hiroyuki Nakanishi, Tsutomu Sasao:
On a wideband fast fourier transform for a radio telescope. SIGARCH Comput. Archit. News 40(5): 46-51 (2012) - Shogo Nakaya, Makoto Miyamura, Noboru Sakimura, Yuichi Nakamura, Tadahiko Sugibayashi:
A non-volatile reconfigurable offloader for wireless sensor nodes. SIGARCH Comput. Archit. News 40(5): 87-92 (2012) - Nicholas Ng, Nobuko Yoshida, Xinyu Niu, Kuen Hung Tsoi:
Session types: towards safe and fast reconfigurable programming. SIGARCH Comput. Archit. News 40(5): 22-27 (2012) - Abdelkrim Kamel Oudjida, Nicolas Chaillet, Mohamed Lamine Berrandjia, Ahmed Liacha:
A new high radix-2r (r≥8) multibit recoding algorithm for large operand size (N≥32) multipliers. SIGARCH Comput. Archit. News 40(4): 32-43 (2012) - Kentaro Sano, Yoshiaki Kono:
FPGA-based Connect6 solver with hardware-accelerated move refinement. SIGARCH Comput. Archit. News 40(5): 4-9 (2012) - Zheng Zhi Shun, Tsutomu Maruyama:
FPGA acceleration of CDO pricing based on correlation expansions. SIGARCH Comput. Archit. News 40(5): 40-45 (2012) - Rizwan Syed, Yajun Ha, Bharadwaj Veeravalli:
A low overhead abstract architecture for FPGA resource management. SIGARCH Comput. Archit. News 40(5): 28-33 (2012) - Alexander Thomasian:
Rebuild processing in RAID5 with emphasis on the supplementary parity augmentation method[37]. SIGARCH Comput. Archit. News 40(2): 18-27 (2012) - Mark Thorson:
Internet nuggets. SIGARCH Comput. Archit. News 40(2): 44-49 (2012) - Mark Thorson:
Internet nuggets. SIGARCH Comput. Archit. News 40(4): 44-48 (2012) - Mark Thorson:
Internet nuggets. SIGARCH Comput. Archit. News 40(5): 93-112 (2012) - Julien Tribino, Antoine Trouvé, Hadrien A. Clarke, Kazuaki J. Murakami:
PASTIS: a photonic arbitration with scalable token injection scheme. SIGARCH Comput. Archit. News 40(5): 76-81 (2012) - Kuen Hung Tsoi, Tobias Becker, Wayne Luk:
Modelling reconfigurable systems in event driven simulation. SIGARCH Comput. Archit. News 40(5): 34-39 (2012) - Takahiro Watanabe, Minoru Watanabe:
0.18 μm CMOS proess high-sensitivity optially reonfgurable gatearray VLSI. SIGARCH Comput. Archit. News 40(5): 82-86 (2012)
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