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Publication search results
found 167 matches
- 2007
- Jacob A. Abraham, Daniel G. Saab:
Tutorial T4A: Formal Verification Techniques and Tools for Complex Designs. VLSI Design 2007: 6 - Shaikh K. Alam:
A 2 GHz Low Power Down-conversion Quadrature Mixer in 0.18-µm CMOS. VLSI Design 2007: 146-154 - Jon Alfredsson, Snorre Aunet, Bengt Oelmann:
Small Fan-in Floating-Gate Circuits with Application to an Improved Adder Structure. VLSI Design 2007: 314-317 - Ajith Amerasekera:
Concurrent Optimization of Technology and Design for Nano CMOS. VLSI Design 2007: 27 - Hamed Aminzadeh, Mohammad Danaie, Reza Lotfi:
Design of Two-Stage Miller-Compensated Amplifiers Based on an Optimized Settling Model. VLSI Design 2007: 171-176 - V. Amudha, B. Venkataramani, R. Vinoth Kumar, S. Ravishankar:
SOC Implementation of HMM Based Speaker Independent Isolated Digit Recognition System. VLSI Design 2007: 848-853 - Kenji Asano, Junji Kitamichi, Kenichi Kuroda:
Proposal of Dynamic Module Library for System Level Modeling and Simulation of Dynamically Reconfigurable Systems. VLSI Design 2007: 373-378 - Maryam Ashouei, Muhammad Mudassar Nisar, Abhijit Chatterjee, Adit D. Singh, Abdulkadir Utku Diril:
Probabilistic Self-Adaptation of Nanoscale CMOS Circuits: Yield Maximization under Increased Intra-Die Variations. VLSI Design 2007: 711-716 - Jeffrey Ayres, Michael L. Bushnell:
Analog Circuit Testing Using Auto Regressive Moving Average Models. VLSI Design 2007: 775-780 - Karthik Baddam, Mark Zwolinski:
Evaluation of Dynamic Voltage and Frequency Scaling as a Differential Power Analysis Countermeasure. VLSI Design 2007: 854-862 - Sayeed A. Badrudduza, Giby Samson, Lawrence T. Clark:
LCSRAM: A Leakage Controlled Six-transistor Static Random Access Memory Cell with Intrinsically High Read Stability. VLSI Design 2007: 621-626 - Rahim Bagheri, Ahmad Mirzaei, Saeed Chehrazi, Asad A. Abidi:
Architecture and Clock Programmable Baseband of an 800 MHz-6 GHz Software-Defined Wireless Receiver. VLSI Design 2007: 135-140 - Ahmad Bahai:
Where Analog meets Digital and Beyond. VLSI Design 2007: 26 - Asral Bahari, Tughrul Arslan, Ahmet T. Erdogan:
Interframe Bus Encoding Technique for Low Power Video Compression. VLSI Design 2007: 691-698 - Sudarshan Bahukudumbi, Krishnendu Chakrabarty:
Test-Length Selection and TAM Optimization for Wafer-Level, Reduced Pin-Count Testing of Core-Based Digital SoCs. VLSI Design 2007: 459-464 - Kedarnath J. Balakrishnan:
Efficient Scan-Based BIST Using Multiple LFSRs and Dictionary Coding. VLSI Design 2007: 345-350 - Pritha Banerjee, Susmita Sur-Kolay, Arijit Bishnu:
Floorplanning in Modern FPGAs. VLSI Design 2007: 893-898 - Nikhil Bansal, Kanishka Lahiri, Anand Raghunathan:
Automatic Power Modeling of Infrastructure IP for System-on-Chip Power Analysis. VLSI Design 2007: 513-520 - Eric Beyne:
Tutorial T7A: Advanced IC Packaging. VLSI Design 2007: 10 - Debayan Bhaduri, Sandeep K. Shukla, Paul S. Graham, Maya B. Gokhale:
Scalable techniques and tools for reliability analysis of large circuits. VLSI Design 2007: 705-710 - Shantanu A. Bhalerao, Abhishek V. Chaudhary, Rajendra M. Patrikar:
A CMOS Low Voltage Charge Pump. VLSI Design 2007: 941-946 - Sarvesh Bhardwaj, Sarma B. K. Vrudhula:
A Fast and Accurate approach for Full Chip Leakage Analysis of Nano-scale circuits considering Intra-die Correlations. VLSI Design 2007: 589-594 - Puranjoy Bhattacharya:
Tutorial IND1A: NeXperia - A Versatile Configurable Platform for Home and Mobile Computing. VLSI Design 2007: 14 - Swarup Bhunia, Saibal Mukhopadhyay, Kaushik Roy:
Process Variations and Process-Tolerant Design. VLSI Design 2007: 699-704 - Samarjit Chakraborty, Abhik Roychoudhury:
Tutorial T8B: Performance Debugging of Complex Embedded Systems. VLSI Design 2007: 13 - Sanghoan Chang, Gwan Choi:
Gate-Level Exception Handling Design for Noise Reduction in High-Speed VLSI Circuits. VLSI Design 2007: 109-114 - Subhomoy Chattopadhyay, Rakesh Patel:
Tutorial T3: Low Power Design Techniques for Nanometer Design Processes - 65nm and Smaller. VLSI Design 2007: 5 - Anupam Chattopadhyay, Diandian Zhang, David Kammler, Ernst Martin Witte:
Power-efficient Instruction Encoding Optimization for Embedded Processors. VLSI Design 2007: 595-600 - Yogesh Singh Chauhan, François Krummenacher, Renaud Gillon, Benoit Bakeroot, Michel J. Declercq, Adrian M. Ionescu:
A New Charge based Compact Model for Lateral Asymmetric MOSFET and its application to High Voltage MOSFET Modeling. VLSI Design 2007: 177-182 - Qikai Chen, Arjun Guha, Kaushik Roy:
An Accurate Analytical SNM Modeling Technique for SRAMs Based on Butterworth Filter Function. VLSI Design 2007: 615-620
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