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ORCIDAnand Raghunathan
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- affiliation: Purdue University, West Lafayette, USA
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2020 – today
- 2020
[j108]Sai Aparna Aketi
, Sourjya Roy, Anand Raghunathan, Kaushik Roy:
Gradual Channel Pruning While Training Using Feature Relevance Scores for Convolutional Neural Networks. IEEE Access 8: 171924-171932 (2020)- [j107]Indranil Chakraborty, Mustafa Fayez Ali, Aayush Ankit, Shubham Jain, Sourjya Roy, Shrihari Sridharan, Amogh Agrawal, Anand Raghunathan, Kaushik Roy:
Resistive Crossbars as Approximate Hardware Building Blocks for Machine Learning: Opportunities and Challenges. Proc. IEEE 108(12): 2276-2310 (2020) - [j106]Swagath Venkataramani, Vivek Joy Kozhikkottu, Amit Sabne, Kaushik Roy, Anand Raghunathan:
Logic Synthesis of Approximate Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(10): 2503-2515 (2020) - [j105]Sarada Krithivasan, Sanchari Sen, Anand Raghunathan:
Sparsity Turns Adversarial: Energy and Latency Attacks on Deep Neural Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(11): 4129-4141 (2020) - [j104]Shubham Jain, Anand Raghunathan:
CxDNN: Hardware-software Compensation Methods for Deep Neural Networks on Resistive Crossbar Systems. ACM Trans. Embed. Comput. Syst. 18(6): 113:1-113:23 (2020) - [j103]Sanjay Ganapathy, Swagath Venkataramani, Giridhur Sriraman, Balaraman Ravindran, Anand Raghunathan:
DyVEDeep: Dynamic Variable Effort Deep Neural Networks. ACM Trans. Embed. Comput. Syst. 19(3): 16:1-16:24 (2020) - [j102]Ashish Ranjan, Arnab Raha, Vijay Raghunathan, Anand Raghunathan:
Approximate Memory Compression. IEEE Trans. Very Large Scale Integr. Syst. 28(4): 980-991 (2020) - [j101]Shubham Jain, Sumeet Kumar Gupta, Anand Raghunathan:
TiM-DNN: Ternary In-Memory Accelerator for Deep Neural Networks. IEEE Trans. Very Large Scale Integr. Syst. 28(7): 1567-1577 (2020) - [c199]Sandeep Krishna Thirumala, Shubham Jain, Sumeet Kumar Gupta, Anand Raghunathan:
Ternary Compute-Enabled Memory using Ferroelectric Transistors for Accelerating Deep Neural Networks. DATE 2020: 31-36 - [c198]Vinod Ganesan, Sanchari Sen, Pratyush Kumar, Neel Gala, Kamakoti Veezhinathan, Anand Raghunathan:
Sparsity-Aware Caches to Accelerate Deep Neural Networks. DATE 2020: 85-90 - [c197]Manik Singhal, Vijay Raghunathan, Anand Raghunathan:
Communication-efficient View-Pooling for Distributed Multi-View Neural Networks. DATE 2020: 1390-1395 - [c196]David Brooks, Martin M. Frank, Tayfun Gokmen, Udit Gupta, Xiaobo Sharon Hu, Shubham Jain, Ann Franchesca Laguna, Michael T. Niemier, Ian O'Connor, Anand Raghunathan, Ashish Ranjan, Dayane Reis, Jacob R. Stevens, Carole-Jean Wu, Xunzhao Yin:
Emerging Neural Workloads and Their Impact on Hardware. DATE 2020: 1462-1471 - [c195]Sanchari Sen, Balaraman Ravindran, Anand Raghunathan:
EMPIR: Ensembles of Mixed Precision Deep Networks for Increased Robustness Against Adversarial Attacks. ICLR 2020 - [c194]Vinod Ganesan, Surya Selvam, Sanchari Sen, Pratyush Kumar, Anand Raghunathan:
A Case for Generalizable DNN Cost Models for Mobile Devices. IISWC 2020: 169-180 - [c193]Sourjya Roy, Priyadarshini Panda, Gopalakrishnan Srinivasan, Anand Raghunathan:
Pruning Filters while Training for Efficiently Optimizing Deep Learning Networks. IJCNN 2020: 1-7 - [i19]Sai Aparna Aketi, Sourjya Roy, Anand Raghunathan, Kaushik Roy:
Gradual Channel Pruning while Training using Feature Relevance Scores for Convolutional Neural Networks. CoRR abs/2002.09958 (2020) - [i18]Sourjya Roy, Shrihari Sridharan, Shubham Jain, Anand Raghunathan:
TxSim: Modeling Training of Deep Neural Networks on Resistive Crossbar Systems. CoRR abs/2002.11151 (2020) - [i17]Sourjya Roy, Priyadarshini Panda, Gopalakrishnan Srinivasan, Anand Raghunathan:
Pruning Filters while Training for Efficiently Optimizing Deep Learning Networks. CoRR abs/2003.02800 (2020) - [i16]Sanchari Sen, Balaraman Ravindran, Anand Raghunathan:
EMPIR: Ensembles of Mixed Precision Deep Networks for Increased Robustness against Adversarial Attacks. CoRR abs/2004.10162 (2020) - [i15]Sarada Krithivasan, Sanchari Sen, Anand Raghunathan:
Adversarial Sparsity Attacks on Deep Neural Networks. CoRR abs/2006.08020 (2020) - [i14]Amrit Nagarajan, Sanchari Sen, Jacob R. Stevens, Anand Raghunathan:
Optimizing Transformers with Approximate Computing for Faster, Smaller and more Accurate NLP Models. CoRR abs/2010.03688 (2020) - [i13]Reena Elangovan, Shubham Jain, Anand Raghunathan:
Ax-BxP: Approximate Blocked Computation for Precision-Reconfigurable Deep Neural Network Acceleration. CoRR abs/2011.13000 (2020)
2010 – 2019
- 2019
- [j100]Shubham Jain, Aayush Ankit, Indranil Chakraborty, Tayfun Gokmen, Malte J. Rasch, Wilfried Haensch, Kaushik Roy, Anand Raghunathan:
Neural network accelerator design with resistive crossbars: Opportunities and challenges. IBM J. Res. Dev. 63(6): 10:1-10:13 (2019) - [j99]Sanchari Sen, Shubham Jain, Swagath Venkataramani, Anand Raghunathan:
SparCE: Sparsity Aware General-Purpose Core Extensions to Accelerate Deep Neural Networks. IEEE Trans. Computers 68(6): 912-925 (2019) - [c192]Athindran Ramesh Kumar, Balaraman Ravindran, Anand Raghunathan:
Pack and Detect: Fast Object Detection in Videos Using Region-of-Interest Packing. COMAD/CODS 2019: 150-156 - [c191]Ashish Ranjan, Shubham Jain, Jacob R. Stevens, Dipankar Das, Bharat Kaul, Anand Raghunathan:
X-MANN: A Crossbar based Architecture for Memory Augmented Neural Networks. DAC 2019: 130 - [c190]Younghoon Kim, Swagath Venkataramani, Nitin Chandrachoodan, Anand Raghunathan:
Data Subsetting: A Data-Centric Approach to Approximate Computing. DATE 2019: 576-581 - [c189]Sarada Krithivasan, Sanchari Sen, Swagath Venkataramani, Anand Raghunathan:
Dynamic Spike Bundling for Energy-Efficient Spiking Neural Networks. ISLPED 2019: 1-6 - [c188]Sandeep Krishna Thirumala, Shubham Jain, Anand Raghunathan, Sumeet Kumar Gupta:
Non-Volatile Memory utilizing Reconfigurable Ferroelectric Transistors to enable Differential Read and Energy-Efficient In-Memory Computation. ISLPED 2019: 1-6 - [c187]Jacob R. Stevens, Ashish Ranjan, Dipankar Das, Bharat Kaul, Anand Raghunathan:
Manna: An Accelerator for Memory-Augmented Neural Networks. MICRO 2019: 794-806 - [p2]Ashish Ranjan, Swagath Venkataramani, Shubham Jain, Younghoon Kim, Shankar Ganesh Ramasubramanian, Arnab Raha, Kaushik Roy, Anand Raghunathan:
Automatic Synthesis Techniques for Approximate Circuits. Approximate Circuits 2019: 123-140 - [i12]Shubham Jain, Sumeet Kumar Gupta, Anand Raghunathan:
TiM-DNN: Ternary in-Memory accelerator for Deep Neural Networks. CoRR abs/1909.06892 (2019) - [i11]Sandeep Krishna Thirumala, Yi-Tse Hung, Shubham Jain, Arnab Raha, Niharika Thakuria, Vijay Raghunathan, Anand Raghunathan, Zhihong Chen, Sumeet Kumar Gupta:
Valley-Coupled-Spintronic Non-Volatile Memories with Compute-In-Memory Support. CoRR abs/1912.07821 (2019) - 2018
- [j98]Sybille Hellebrand, Jörg Henkel, Anand Raghunathan, Hans-Joachim Wunderlich:
Guest Editors' Introduction. IEEE Embed. Syst. Lett. 10(1): 1 (2018) - [j97]Setareh Behroozi, Vijay Raghunathan, Anand Raghunathan, Younghyun Kim:
A Quality-Configurable Approximate Serial Bus for Energy-Efficient Sensory Data Transfer. IEEE J. Emerg. Sel. Topics Circuits Syst. 8(3): 379-390 (2018) - [j96]Syed Shakib Sarwar, Gopalakrishnan Srinivasan, Bing Han, Parami Wijesinghe, Akhilesh Jaiswal, Priyadarshini Panda, Anand Raghunathan, Kaushik Roy:
Energy Efficient Neural Computing: A Study of Cross-Layer Approximations. IEEE J. Emerg. Sel. Topics Circuits Syst. 8(4): 796-809 (2018) - [j95]Syed Shakib Sarwar, Swagath Venkataramani, Aayush Ankit, Anand Raghunathan, Kaushik Roy:
Energy-Efficient Neural Computing with Approximate Multipliers. ACM J. Emerg. Technol. Comput. Syst. 14(2): 16:1-16:23 (2018) - [j94]Sanchari Sen, Anand Raghunathan:
Approximate Computing for Long Short Term Memory (LSTM) Neural Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(11): 2266-2276 (2018) - [j93]Shubham Jain, Ashish Ranjan, Kaushik Roy, Anand Raghunathan:
Computing in Memory With Spin-Transfer Torque Magnetic RAM. IEEE Trans. Very Large Scale Integr. Syst. 26(3): 470-483 (2018) - [c186]Jacob R. Stevens, Yue Du, Vivek Kozhikkott, Anand Raghunathan:
ACCLIB: Accelerators as libraries. DATE 2018: 245-248 - [c185]Shubham Jain, Sachin S. Sapatnekar, Jianping Wang, Kaushik Roy, Anand Raghunathan:
Computing-in-memory with spintronics. DATE 2018: 1640-1645 - [c184]Jacob R. Stevens, Ashish Ranjan, Anand Raghunathan:
AxBA: an approximate bus architecture framework. ICCAD 2018: 43 - [c183]Kyuin Lee, Vijay Raghunathan, Anand Raghunathan, Younghyun Kim:
SYNCVIBE: Fast and Secure Device Pairing through Physical Vibration on Commodity Smartphones. ICCD 2018: 234-241 - [i10]Shubham Jain, Abhronil Sengupta, Kaushik Roy, Anand Raghunathan:
Rx-Caffe: Framework for evaluating and training Deep Neural Networks on Resistive Crossbars. CoRR abs/1809.00072 (2018) - [i9]Athindran Ramesh Kumar, Balaraman Ravindran, Anand Raghunathan:
Pack and Detect: Fast Object Detection in Videos Using Region-of-Interest Packing. CoRR abs/1809.01701 (2018) - 2017
- [j92]Arsalan Mosenia, Susmita Sur-Kolay, Anand Raghunathan, Niraj K. Jha:
CABA: Continuous Authentication Based on BioAura. IEEE Trans. Computers 66(5): 759-772 (2017) - [j91]Younghyun Kim, Vijay Raghunathan, Anand Raghunathan:
Design and Management of Battery-Supercapacitor Hybrid Electrical Energy Storage Systems for Regulation Services. IEEE Trans. Multi Scale Comput. Syst. 3(1): 12-24 (2017) - [j90]Arsalan Mosenia, Susmita Sur-Kolay, Anand Raghunathan, Niraj K. Jha:
Wearable Medical Sensor-Based System Design: A Survey. IEEE Trans. Multi Scale Comput. Syst. 3(2): 124-138 (2017) - [j89]Arsalan Mosenia, Susmita Sur-Kolay, Anand Raghunathan, Niraj K. Jha:
DISASTER: Dedicated Intelligent Security Attacks on Sensor-Triggered Emergency Responses. IEEE Trans. Multi Scale Comput. Syst. 3(4): 255-268 (2017) - [j88]Arnab Raha, Swagath Venkataramani, Vijay Raghunathan, Anand Raghunathan:
Energy-Efficient Reduce-and-Rank Using Input-Adaptive Approximations. IEEE Trans. Very Large Scale Integr. Syst. 25(2): 462-475 (2017) - [j87]Neel Gala, Swagath Venkataramani, Anand Raghunathan, V. Kamakoti:
Approximate Error Detection With Stochastic Checkers. IEEE Trans. Very Large Scale Integr. Syst. 25(8): 2258-2270 (2017) - [j86]Priyadarshini Panda, Swagath Venkataramani, Abhronil Sengupta, Anand Raghunathan, Kaushik Roy:
Energy-Efficient Object Detection Using Semantic Decomposition. IEEE Trans. Very Large Scale Integr. Syst. 25(9): 2673-2677 (2017) - [c182]Jianping Wang, Sachin S. Sapatnekar, Chris H. Kim, Paul A. Crowell, Steven J. Koester, Supriyo Datta, Kaushik Roy, Anand Raghunathan, Xiaobo Sharon Hu, Michael T. Niemier, Azad Naeemi, Chia-Ling Chien, Caroline A. Ross, Roland Kawakami:
A Pathway to Enable Exponential Scaling for the Beyond-CMOS Era: Invited. DAC 2017: 16:1-16:6 - [c181]Sanchari Sen, Swagath Venkataramani, Anand Raghunathan:
Approximate computing for spiking neural networks. DATE 2017: 193-198 - [c180]Ashish Ranjan, Swagath Venkataramani, Zoha Pajouhi, Rangharajan Venkatesan, Kaushik Roy, Anand Raghunathan:
STAxCache: An approximate, energy efficient STT-MRAM cache. DATE 2017: 356-361 - [c179]Swagath Venkataramani, Ashish Ranjan, Subarno Banerjee, Dipankar Das, Sasikanth Avancha, Ashok Jagannathan, Ajaya Durg, Dheemanth Nagaraj, Bharat Kaul, Pradeep Dubey, Anand Raghunathan:
ScaleDeep: A Scalable Compute Architecture for Learning and Evaluating Deep Networks. ISCA 2017: 13-26 - [c178]Younghyun Kim, Setareh Behroozi, Vijay Raghunathan, Anand Raghunathan:
AXSERBUS: A quality-configurable approximate serial bus for energy-efficient sensing. ISLPED 2017: 1-6 - [c177]Ashish Ranjan, Arnab Raha, Vijay Raghunathan, Anand Raghunathan:
Approximate memory compression for energy-efficiency. ISLPED 2017: 1-6 - [c176]Arnab Roy, Swagath Venkataramani, Neel Gala, Sanchari Sen, Kamakoti Veezhinathan, Anand Raghunathan:
A Programmable Event-driven Architecture for Evaluating Spiking Neural Networks. ISLPED 2017: 1-6 - [c175]Amit Sabne, Xiao Wang, Sherman J. Kisner, Charles A. Bouman, Anand Raghunathan, Samuel P. Midkiff:
Model-based Iterative CT Image Reconstruction on GPUs. PPOPP 2017: 207-220 - [i8]Shubham Jain, Ashish Ranjan, Kaushik Roy, Anand Raghunathan:
Computing in Memory with Spin-Transfer Torque Magnetic RAM. CoRR abs/1703.02118 (2017) - [i7]Sanjay Ganapathy, Swagath Venkataramani, Balaraman Ravindran, Anand Raghunathan:
DyVEDeep: Dynamic Variable Effort Deep Neural Networks. CoRR abs/1704.01137 (2017) - [i6]Sanchari Sen, Shubham Jain, Swagath Venkataramani, Anand Raghunathan:
SparCE: Sparsity aware General Purpose Core Extensions to Accelerate Deep Neural Networks. CoRR abs/1711.06315 (2017) - 2016
- [j85]Kaushik Roy, Byunghoo Jung, Dimitrios Peroulis, Anand Raghunathan:
Integrated Systems in the More-Than-Moore Era: Designing Low-Cost Energy-Efficient Systems Using Heterogeneous Components. IEEE Des. Test 33(3): 56-65 (2016) - [j84]Zoha Pajouhi, Xuanyao Fong, Anand Raghunathan, Kaushik Roy:
Yield, Area, and Energy Optimization in STT-MRAMs Using Failure-Aware ECC. ACM J. Emerg. Technol. Comput. Syst. 13(2): 20:1-20:20 (2016) - [j83]A. Arun Goud, Rangharajan Venkatesan, Anand Raghunathan, Kaushik Roy:
Asymmetric Underlapped FinFETs for Near- and Super-Threshold Logic at Sub-10nm Technology Nodes. ACM J. Emerg. Technol. Comput. Syst. 13(2): 23:1-23:22 (2016) - [j82]Xuanyao Fong, Yusung Kim, Rangharajan Venkatesan, Sri Harsha Choday, Anand Raghunathan, Kaushik Roy:
Spin-Transfer Torque Memories: Devices, Circuits, and Systems. Proc. IEEE 104(7): 1449-1488 (2016) - [j81]Rangharajan Venkatesan, Vivek Joy Kozhikkottu, Mrigank Sharad, Charles Augustine, Arijit Raychowdhury, Kaushik Roy, Anand Raghunathan:
Cache Design with Domain Wall Memory. IEEE Trans. Computers 65(4): 1010-1024 (2016) - [j80]Xuanyao Fong, Yusung Kim, Karthik Yogendra, Deliang Fan, Abhronil Sengupta, Anand Raghunathan, Kaushik Roy:
Spin-Transfer Torque Devices for Logic and Memory: Prospects and Perspectives. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(1): 1-22 (2016) - [j79]Arsalan Mohsen Nia, Susmita Sur-Kolay, Anand Raghunathan, Niraj K. Jha:
Physiological Information Leakage: A New Frontier in Health Information Security. IEEE Trans. Emerg. Top. Comput. 4(3): 321-334 (2016) - [j78]Xuanyao Fong, Rangharajan Venkatesan, Dongsoo Lee, Anand Raghunathan, Kaushik Roy:
Embedding Read-Only Memory in Spin-Transfer Torque MRAM-Based On-Chip Caches. IEEE Trans. Very Large Scale Integr. Syst. 24(3): 992-1002 (2016) - [j77]Junshi Liu, Swagath Venkataramani, Singanallur V. Venkatakrishnan, Yun Pan, Charles A. Bouman, Anand Raghunathan:
EMBIRA: An Accelerator for Model-Based Iterative Reconstruction. IEEE Trans. Very Large Scale Integr. Syst. 24(11): 3243-3256 (2016) - [j76]Vivek Joy Kozhikkottu, Rangharajan Venkatesan, Anand Raghunathan, Sujit Dey:
Emulation-Based Analysis of System-on-Chip Performance Under Variations. IEEE Trans. Very Large Scale Integr. Syst. 24(12): 3401-3414 (2016) - [c174]Swagath Venkataramani, Kaushik Roy, Anand Raghunathan:
Efficient embedded learning for IoT devices. ASP-DAC 2016: 308-311 - [c173]Younghoon Kim, Swagath Venkataramani, Kaushik Roy, Anand Raghunathan:
Designing approximate circuits using clock overgating. DAC 2016: 15:1-15:6 - [c172]Priyadarshini Panda, Abhronil Sengupta, Syed Shakib Sarwar, Gopalakrishnan Srinivasan, Swagath Venkataramani, Anand Raghunathan, Kaushik Roy:
Invited - Cross-layer approximations for neuromorphic computing: from devices to circuits and systems. DAC 2016: 98:1-98:6 - [c171]Syed Shakib Sarwar, Swagath Venkataramani, Anand Raghunathan, Kaushik Roy:
Multiplier-less Artificial Neurons exploiting error resiliency for energy-efficient neural computing. DATE 2016: 145-150 - [c170]Shubham Jain, Swagath Venkataramani, Anand Raghunathan:
Approximation through logic isolation for the design of quality configurable circuits. DATE 2016: 612-617 - [c169]Neel Gala, Swagath Venkataramani, Anand Raghunathan, V. Kamakoti:
STOCK: Stochastic Checkers for Low-overhead Approximate Error Detection. ISLPED 2016: 266-271 - [c168]Xiao Wang, Amit Sabne, Sherman J. Kisner, Anand Raghunathan, Charles A. Bouman, Samuel P. Midkiff:
High performance model based image reconstruction. PPOPP 2016: 2:1-2:12 - [c167]Swagath Venkataramani, Kaushik Roy, Anand Raghunathan:
Approximate Computing. VLSI Design 2016: 3-4 - [c166]Abhronil Sengupta, Priyadarshini Panda, Anand Raghunathan, Kaushik Roy:
Neuromorphic Computing Enabled by Spin-Transfer Torque Devices. VLSI Design 2016: 32-37 - [i5]Syed Shakib Sarwar, Swagath Venkataramani, Anand Raghunathan, Kaushik Roy:
Multiplier-less Artificial Neurons Exploiting Error Resiliency for Energy-Efficient Neural Computing. CoRR abs/1602.08557 (2016) - 2015
- [j75]Rangharajan Venkatesan, Mrigank Sharad, Kaushik Roy, Anand Raghunathan:
Energy-Efficient All-Spin Cache Hierarchy Using Shift-Based Writes and Multilevel Storage. ACM J. Emerg. Technol. Comput. Syst. 12(1): 4:1-4:27 (2015) - [j74]Zoha Pajouhi, Swagath Venkataramani, Karthik Yogendra, Anand Raghunathan, Kaushik Roy:
Exploring Spin-Transfer-Torque Devices for Logic Applications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34(9): 1441-1454 (2015) - [j73]Mehran Mozaffari Kermani, Susmita Sur-Kolay, Anand Raghunathan, Niraj K. Jha:
Systematic Poisoning Attacks on and Defenses for Machine Learning in Healthcare. IEEE J. Biomed. Health Informatics 19(6): 1893-1905 (2015) - [j72]Arsalan Mohsen Nia, Mehran Mozaffari Kermani, Susmita Sur-Kolay, Anand Raghunathan, Niraj K. Jha:
Energy-Efficient Long-term Continuous Personal Health Monitoring. IEEE Trans. Multi Scale Comput. Syst. 1(2): 85-98 (2015) - [j71]Ali Mirtar, Sujit Dey, Anand Raghunathan:
An Application Adaptation Approach to Mitigate the Impact of Dynamic Thermal Management on Video Encoding. ACM Trans. Design Autom. Electr. Syst. 20(4): 50:1-50:27 (2015) - [j70]Ali Mirtar, Sujit Dey, Anand Raghunathan:
Joint Work and Voltage/Frequency Scaling for Quality-Optimized Dynamic Thermal Management. IEEE Trans. Very Large Scale Integr. Syst. 23(6): 1017-1030 (2015) - [c165]Younghyun Kim, Woo Suk Lee, Vijay Raghunathan, Niraj K. Jha, Anand Raghunathan:
Vibration-based secure side channel for medical devices. DAC 2015: 32:1-32:6 - [c164]Swagath Venkataramani, Anand Raghunathan, Jie Liu, Mohammed Shoaib:
Scalable-effort classifiers for energy-efficient machine learning. DAC 2015: 67:1-67:6 - [c163]Swagath Venkataramani, Srimat T. Chakradhar, Kaushik Roy, Anand Raghunathan:
Approximate computing and the quest for computing efficiency. DAC 2015: 120:1-120:6 - [c162]Ashish Ranjan, Swagath Venkataramani, Xuanyao Fong, Kaushik Roy, Anand Raghunathan:
Approximate storage for energy efficient spintronic memories. DAC 2015: 195:1-195:6 - [c161]Ashish Ranjan, Shankar Ganesh Ramasubramanian, Rangharajan Venkatesan, Vijay S. Pai, Kaushik Roy, Anand Raghunathan:
DyReCTape: a <u>dy</u>namically <u>re</u>configurable <u>c</u>ache using domain wall memory <u>tape</u>s. DATE 2015: 181-186 - [c160]A. Arun Goud, Rangharajan Venkatesan, Anand Raghunathan, Kaushik Roy:
Asymmetric underlapped FinFET based robust SRAM design at 7nm node. DATE 2015: 659-664 - [c159]Arnab Raha, Swagath Venkataramani, Vijay Raghunathan, Anand Raghunathan:
Quality configurable reduce-and-rank for energy efficient approximate computing. DATE 2015: 665-670 - [c158]Swagath Venkataramani, Srimat T. Chakradhar, Kaushik Roy, Anand Raghunathan:
Computing approximately, and efficiently. DATE 2015: 748-751 - [c157]Rangharajan Venkatesan, Swagath Venkataramani, Xuanyao Fong, Kaushik Roy, Anand Raghunathan:
Spintastic: <u>spin</u>-based s<u>t</u>och<u>astic</u> logic for energy-efficient computing. DATE 2015: 1575-1578 - [c156]Kaushik Roy, Anand Raghunathan:
Approximate Computing: An Energy-Efficient Computing Technique for Error Resilient Applications. ISVLSI 2015: 473-475 - [i4]Zoha Pajouhi, Xuanyao Fong, Anand Raghunathan, Kaushik Roy:
Yield, Area and Energy Optimization in Stt-MRAMs using failure aware ECC. CoRR abs/1509.08806 (2015) - [i3]Priyadarshini Panda, Abhronil Sengupta, Swagath Venkataramani, Anand Raghunathan, Kaushik Roy:
Object Detection using Semantic Decomposition for Energy-Efficient Neural Computing. CoRR abs/1509.08970 (2015) - 2014
- [j69]Meng Zhang, Anand Raghunathan, Niraj K. Jha:
A defense framework against malware and vulnerability exploits. Int. J. Inf. Sec. 13(5): 439-452 (2014) - [j68]Meng Zhang, Anand Raghunathan, Niraj K. Jha:
Trustworthiness of Medical Devices and Body Area Networks. Proc. IEEE 102(8): 1174-1188 (2014) - [j67]Vinay Kumar Chippa, Debabrata Mohapatra, Kaushik Roy, Srimat T. Chakradhar, Anand Raghunathan:
Scalable Effort Hardware Design. IEEE Trans. Very Large Scale Integr. Syst. 22(9): 2004-2016 (2014) - [c155]Vivek Joy Kozhikkottu, Abhisek Pan, Vijay S. Pai, Sujit Dey, Anand Raghunathan:
Variation Aware Cache Partitioning for Multithreaded Programs. DAC 2014: 199:1-199:6 - [c154]Ashish Ranjan, Arnab Raha, Swagath Venkataramani, Kaushik Roy, Anand Raghunathan:
ASLAN: Synthesis of approximate sequential circuits. DATE 2014: 1-6 - [c153]Swagath Venkataramani, Srimat T. Chakradhar, Kaushik Roy, Anand Raghunathan:
Approximate computing for efficient information processing. ESTImedia 2014: 9-10 - [c152]Younghyun Kim, Vijay Raghunathan, Anand Raghunathan:
Design and management of hybrid electrical energy storage systems for regulation services. IGCC 2014: 1-9 - [c151]Rangharajan Venkatesan, Shankar Ganesh Ramasubramanian, Swagath Venkataramani, Kaushik Roy, Anand Raghunathan:
STAG: Spintronic-Tape Architecture for GPGPU cache hierarchies. ISCA 2014: 253-264 - [c150]Shankar Ganesh Ramasubramanian, Rangharajan Venkatesan, Mrigank Sharad, Kaushik Roy, Anand Raghunathan:
SPINDLE: SPINtronic deep learning engine for large-scale neuromorphic computing. ISLPED 2014: 15-20 - [c149]Swagath Venkataramani, Ashish Ranjan, Kaushik Roy, Anand Raghunathan:
AxNN: energy-efficient neuromorphic systems using approximate computing. ISLPED 2014: 27-32 - [c148]Vinay K. Chippa, Swagath Venkataramani, Kaushik Roy, Anand Raghunathan:
StoRM: a stochastic recognition and mining processor. ISLPED 2014: 39-44 - [c147]Vivek Joy Kozhikkottu, Swagath Venkataramani, Sujit Dey, Anand Raghunathan:
Variation tolerant design of a vector processor for recognition, mining and synthesis. ISLPED 2014: 239-244 - [c146]Faraz Ahmad, Srimat T. Chakradhar, Anand Raghunathan, T. N. Vijaykumar:
ShuffleWatcher: Shuffle-aware Scheduling in Multi-tenant MapReduce Clusters. USENIX Annual Technical Conference 2014: 1-12 - [e3]Karam S. Chatha, Rolf Ernst, Anand Raghunathan, Ravishankar R. Iyer:
2014 International Conference on Compilers, Architecture and Synthesis for Embedded Systems, CASES 2014, Uttar Pradesh, India, October 12-17, 2014. ACM 2014, ISBN 978-1-4503-3050-3 [contents] - [i2]Deliang Fan, Yong Shim, Anand Raghunathan, Kaushik Roy:
STT-SNN: A Spin-Transfer-Torque Based Soft-Limiting Non-Linear Neuron for Low-Power Artificial Neural Networks. CoRR abs/1412.8648 (2014) - 2013
- [j66]Chunxiao Li, Anand Raghunathan, Niraj K. Jha:
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