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Publication search results
found 11 matches
- 2016
- Hari Chauhan, Vladimir Kvartenko, Marvin Onabajo:
A Tuning Technique for Temperature and Process Variation Compensation of Power Amplifiers with Digital Predistortion. NATW 2016: 38-45 - Yongsuk Choi, Yong-Bin Kim, In-Seok Jung:
A 100MS/s 10-bit Split-SAR ADC with Capacitor Mismatch Compensation Using Built-In Calibration. NATW 2016: 1-5 - Malinky Ghosh, Kelly A. Ockunzzi:
Automated and Reusable IP Functional Test Rule Development across Multiple IP Instances within and across Asic Designs. NATW 2016: 34-37 - Md. Nazmul Islam, Sandip Kundu:
Modeling Residual Life of an IC Considering Multiple Aging Mechanisms. NATW 2016: 24-27 - Xiao Liu, Changkai Yu, Yu Qi, Yu Huang, James Fu:
Case Study of Testing a SoC Design with Mixed EDT Channel Sharing and Channel Broadcasting. NATW 2016: 12-17 - Joseph Nguyen, David Turgis, David Bonciani, Brice Lhomme, Yann Carminati, Olivier Callen, Guillaume Guirleo, Lorenzo Ciampolini, Gérard Ghibaudo:
RAPIDO Testing and Modeling of Assisted Write and Read Operations for SRAMs. NATW 2016: 28-33 - Amirhossein Shahshahani, Andrey Tolstikhin, Zeljko Zilic:
Enabling Debug in IoT Wireless Development and Deployment with Security Considerations. NATW 2016: 53-58 - Muralidharan Venkatasubramanian, Vishwani D. Agrawal:
Failures Guide Probabilistic Search for a Hard-to-Find Test. NATW 2016: 18-23 - Chen Zhang, Gyunam Jeon, Yongsuk Choi, Yong-Bin Kim, Kyung Ki Kim:
An Area Efficient 4Gb/s Half-Rate 3-Tap DFE with Current-Integrating Summer for Data Correction. NATW 2016: 6-11 - Fanchen Zhang, Yi Sun, Xi Shen, Kundan Nepal, Jennifer Dworak, Theodore W. Manikas, Ping Gui, R. Iris Bahar, Al Crouch, John C. Potter:
Using Existing Reconfigurable Logic in 3D Die Stacks for Test. NATW 2016: 46-52 - 25th IEEE North Atlantic Test Workshop, NATW 2016, Providence, RI, USA, May 9-11, 2016. IEEE 2016, ISBN 978-1-4673-8949-5 [contents]
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