- Tomasz S. Czajkowski, Stephen Dean Brown:
Fast toggle rate computation for FPGA circuits. FPL 2008: 65-70 - Martin Danek, Jiri Kadlec, Roman Bartosinski, Lukas Kohout:
Increasing the level of abstraction in FPGA-based designs. FPL 2008: 5-10 - Alexander Danilin, Sergei Sawitzki, Erik Rijshouwer:
Reconfigurable cell architecture for multi-standard interleaving and deinterleaving in digital communication systems. FPL 2008: 527-530 - Stanislaw Deniziak, Mariusz Wisniewski:
An symbolic decomposition of functions with multi-valued inputs and outputs for FPGA-based implementation. FPL 2008: 397-402 - Ozana Silvia Dragomir, Todor P. Stefanov, Koen Bertels:
Loop unrolling and shifting for reconfigurable architectures. FPL 2008: 167-172 - Andreas Ehliar, Per Karlström, Dake Liu:
A high performance microprocessor with DSP extensions optimized for the Virtex-4 FPGA. FPL 2008: 599-602 - Sven Eisenhardt, Thomas Schweizer, Julio A. de Oliveira Filho, Tobias Oppold, Wolfgang Rosenstiel, Alexander Thomas, Jürgen Becker, Frank Hannig, Dmitrij Kissler, Hritam Dutta, Jürgen Teich, Heiko Hinkelmann, Peter Zipf, Manfred Glesner:
Coarse-grained reconfiguration. FPL 2008: 349 - Hongbing Fan, Jason Ernst, Yu-Liang Wu:
Customized Reconfigurable Interconnection Networks for multiple application SOCS. FPL 2008: 491-494 - Sándor P. Fekete, Tom Kamphans, Nils Schweer, Christopher Tessars, Jan van der Veen, Josef Angermeier, Dirk Koch, Jürgen Teich:
No-break dynamic defragmentation of reconfigurable devices. FPL 2008: 113-118 - Shakith Fernando, Xiaolei Chen, Yajun Ha:
sFPGA - A scalable switch based FPGA architecture and design methodology. FPL 2008: 95-100 - Ricardo S. Ferreira, Marcone Laure, Mateus B. Rutzig, Antonio Carlos Schneider Beck, Luigi Carro:
Reducing interconnection cost in coarse-grained dynamic computing through multistage network. FPL 2008: 47-52 - Viktor Fischer, Florent Bernard, Nathalie Bochard, Michal Varchola:
Enhancing security of ring oscillator-based trng implemented in FPGA. FPL 2008: 245-250 - Henrique C. Freitas, Philippe Olivier Alexandre Navaux, Tatiana Gadelha Serra dos Santos:
NOC architecture design for multi-cluster chips. FPL 2008: 53-58 - Wenyin Fu, Katherine Compton:
Active kernel monitoring to combat scheduler gaming in reconfigurable computing systems. FPL 2008: 611-614 - Hagen Gädke, Florian Stock, Andreas Koch:
Memory access parallelisation in high-level language compilation for reconfigurable adaptive computers. FPL 2008: 403-408 - Changjian Gao, Shih-Lien Lu:
Novel FPGA based Haar classifier face detection algorithm acceleration. FPL 2008: 373-378 - Heiner Giefers:
Reconfigurable many-cores with lean interconnect. FPL 2008: 707-708 - Diana Göhringer, Michael Hübner, Thomas Perschke, Jürgen Becker:
New dimensions for multiprocessor architectures: Ondemand heterogeneity, infrastructure and performance through reconfigurability - the RAMPSoC approach. FPL 2008: 495-498 - Yoann Guillemenet, Lionel Torres, Gilles Sassatelli, Nicolas Bruchon, Ilham Hassoune:
A non-volatile run-time FPGA using thermally assisted switching MRAMS. FPL 2008: 421-426 - Sylvain Guilley, Laurent Sauvage, Jean-Luc Danger, Philippe Hoogvorst:
Area optimization of cryptographic co-processors implemented in dual-rail with precharge positive logic. FPL 2008: 161-166 - Tim Güneysu, Christof Paar, Gerd Pfeiffer, Manfred Schimmler:
Enhancing COPACOBANA for advanced applications in cryptography and cryptanalysis. FPL 2008: 675-678 - Andre Guntoro, Manfred Glesner:
A lifting-based DWT and IDWT processor with multi-context configuration and normalization factor. FPL 2008: 479-482 - Andre Guntoro, Manfred Glesner:
High-performance fpga-based floating-point adder with three inputs. FPL 2008: 627-630 - Jim Harkin, Fearghal Morgan, Steve Hall, Piotr Dudek, Thomas Dowrick, Liam McDaid:
Reconfigurable platforms and the challenges for large-scale implementations of spiking neural networks. FPL 2008: 483-486 - Heiko Hinkelmann, Peter Zipf, Manfred Glesner, Matthias Alles, Timo Vogt, Norbert Wehn, Götz Kappen, Tobias G. Noll:
Application-specific reconfigurable processors. FPL 2008: 350 - Chun Hok Ho, Philip Heng Wai Leong, Wayne Luk, Steven J. E. Wilton:
Rapid estimation of power consumption for hybrid FPGAs. FPL 2008: 227-232 - Christian Hochberger, Alexander Weiss:
A new methodology for debugging and validation of soft cores. FPL 2008: 551-554 - Yohei Hori, Akashi Satoh, Hirofumi Sakane, Kenji Toda:
Bitstream encryption and authentication with AES-GCM in dynamically reconfigurable systems. FPL 2008: 23-28 - Jing Hu, Steven F. Quigley, Andrew Chan:
An element-by-element preconditioned Conjugate Gradient solver of 3D tetrahedral finite elements on an FPGA coprocessor. FPL 2008: 575-578 - Yasuhiro Ito, Yutaka Sugawara, Mary Inaba, Kei Hiraki:
CVC: The C to RTL compiler for callback-based verification model. FPL 2008: 499-502