Stop the war!

Остановите войну!

for scientists:

default search action

combined dblp search
author search
venue search
publication search

ask others

"Generation of distributed logic-memory architectures through high-level ..."

Chao Huang et al. (2005)

> Home

Details and statistics

DOI: 10.1109/TCAD.2005.852276

access: closed

type: Journal Article

metadata version: 2021-10-14

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/tcad/HuangRRJ05
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/tcad/HuangRRJ05
Chao Huang, Srivaths Ravi, Anand Raghunathan, Niraj K. Jha:
Generation of distributed logic-memory architectures through high-level synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(11): 1694-1711 (2005)

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.