"Logic Process Compatible 40-nm 16-Mb, Embedded Perpendicular-MRAM With ..."

Yi-Chun Shih et al. (2019)

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DOI: 10.1109/JSSC.2018.2889106

access: closed

type: Journal Article

metadata version: 2021-04-07

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Yi-Chun Shih, Chia-Fu Lee, Yen-An Chang, Po-Hao Lee, Hon-Jarn Lin, Yu-Lin Chen, Ku-Feng Lin, Ta-Ching Yeh, Hung-Chang Yu, Harry Chuang, Yu-Der Chih, Tsung-Yung Jonathan Chang:
Logic Process Compatible 40-nm 16-Mb, Embedded Perpendicular-MRAM With Hybrid-Resistance Reference, Sub- $\mu$ A Sensing Resolution, and 17.5-nS Read Access Time. IEEE J. Solid State Circuits 54(4): 1029-1038 (2019)

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