"Memory Array Demonstration of fully integrated 1T-1C FeFET concept with ..."

Konrad Seidel et al. (2022)

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DOI: 10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830141

access: closed

type: Conference or Workshop Paper

metadata version: 2022-10-02

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Konrad Seidel, David Lehninger, Raik Hoffmann, Tarek Ali, Maximilian Lederer, Ricardo Revello, Konstantin Mertens, Kati Biedermann, Yukai Shen, Defu Wang, Matthias Landwehr, Andreas Heinig, Thomas Kämpfe, Hannes Mähne, Kerstin Bernert, Steffen Thiem:
Memory Array Demonstration of fully integrated 1T-1C FeFET concept with separated ferroelectric MFM device in interconnect layer. VLSI Technology and Circuits 2022: 355-356

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