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"Cycling endurance optimization scheme for 1Mb STT-MRAM in 40nm technology."
Hung-Chang Yu et al. (2013)
- Hung-Chang Yu, Kai-Chun Lin, Ku-Feng Lin, Chin-Yi Huang, Yu-Der Chih, Tong-Chern Ong, Jonathan Chang, Sreedhar Natarajan, Luan C. Tran:

Cycling endurance optimization scheme for 1Mb STT-MRAM in 40nm technology. ISSCC 2013: 224-225

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