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"An energy-efficient graphics processor featuring fine-grain DVFS with ..."

Pascal Meinerzhagen et al. (2018)

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DOI: 10.1109/ISSCC.2018.8310172

access: closed

type: Conference or Workshop Paper

metadata version: 2022-10-02

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  - conf/isscc/MeinerzhagenTMV18
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  - https://dblp.org/rec/conf/isscc/MeinerzhagenTMV18
Pascal Meinerzhagen, Carlos Tokunaga, Andres Malavasi, Vaibhav A. Vaidya, Ashwin Mendon, Deepak Mathaikutty, Jaydeep Kulkarni, Charles Augustine, Minki Cho, Stephen T. Kim, George E. Matthew, Rinkle Jain, Joseph F. Ryan, Chung-Ching Peng, Somnath Paul, Sriram R. Vangal, Brando Perez Esparza, Luis Cuellar, Michael Woodman, Bala Iyer, Subramaniam Maiyuran, Gautham N. Chinya, Chris Zou, Yuyun Liao, Krishnan Ravichandran, Hong Wang, Muhammad M. Khellah, James W. Tschanz, Vivek De:
An energy-efficient graphics processor featuring fine-grain DVFS with integrated voltage regulators, execution-unit turbo, and retentive sleep in 14nm tri-gate CMOS. ISSCC 2018: 38-40

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