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ORCID"BDD Circuit Optimization for Path Delay Fault Testability."
Görschwin Fey, Junhao Shi, Rolf Drechsler (2004)
- Görschwin Fey
, Junhao Shi, Rolf Drechsler:
BDD Circuit Optimization for Path Delay Fault Testability. DSD 2004: 168-172
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