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ORCID"A statistical gate delay model for intra-chip and inter-chip variabilities."
Ken-ichi Okada, Kento Yamaoka, Hidetoshi Onodera (2003)
- Ken-ichi Okada, Kento Yamaoka, Hidetoshi Onodera:
A statistical gate delay model for intra-chip and inter-chip variabilities. ASP-DAC 2003: 31-36
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