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ORCIDVwani P. Roychowdhury
- > Home > Persons > Vwani P. Roychowdhury
Publications
- 2019
[i27]Lichao Chen, Sudhir Singh, Thomas Kailath, Vwani P. Roychowdhury:
Brain-inspired automated visual object discovery and detection. CoRR abs/1910.04864 (2019)- 2008
- [j62]Yumao Lu, Vwani P. Roychowdhury:
Parallel randomized sampling for support vector machine (SVM) and support vector regression (SVR). Knowl. Inf. Syst. 14(2): 233-247 (2008) - [j61]Joachim Dahl, Lieven Vandenberghe
, Vwani P. Roychowdhury:
Covariance selection for nonchordal graphs via chordal embedding. Optim. Methods Softw. 23(4): 501-520 (2008) - [j56]Yumao Lu, Vwani P. Roychowdhury, Lieven Vandenberghe:
Distributed Parallel Support Vector Machines in Strongly Connected Networks. IEEE Trans. Neural Networks 19(7): 1167-1178 (2008) - 2006
- [c31]Yumao Lu, Vwani P. Roychowdhury:
Parallel Randomized Support Vector Machine. PAKDD 2006: 205-214 - 1996
- [j16]Theodora A. Varvarigou, Vwani P. Roychowdhury, Thomas Kailath, Eugene L. Lawler:
Scheduling In and Out Forests in the Presence of Communication Delays. IEEE Trans. Parallel Distributed Syst. 7(10): 1065-1074 (1996) - 1995
- [j15]Vwani P. Roychowdhury, Kai-Yeung Siu, Alon Orlitsky, Thomas Kailath:
Vector Analysis of Threshold Functions. Inf. Comput. 120(1): 22-31 (1995) - [j14]Kai-Yeung Xu, Vwani P. Roychowdhury, Thomas Kailath:
Toward Massively Parallel Design of Multipliers. J. Parallel Distributed Comput. 24(1): 86-93 (1995) - [j13]Vwani P. Roychowdhury, Kai-Yeung Siu, Thomas Kailath:
Classification of linearly nonseparable patterns by linear threshold elements. IEEE Trans. Neural Networks 6(2): 318-331 (1995) - 1994
- [j12]Kai-Yeung Siu, Vwani P. Roychowdhury:
On Optimal Depth Threshold Circuits for Multiplication and Related Problems. SIAM J. Discret. Math. 7(2): 284-292 (1994) - [j11]Kai-Yeung Siu, Vwani P. Roychowdhury, Thomas Kailath:
Rational approximation techniques for analysis of neural networks. IEEE Trans. Inf. Theory 40(2): 455-466 (1994) - [j10]Vwani P. Roychowdhury, Alon Orlitsky, Kai-Yeung Siu:
Lower bounds on threshold and related circuits via communication complexity. IEEE Trans. Inf. Theory 40(2): 467-474 (1994) - 1993
- [j9]Theodora A. Varvarigou, Vwani P. Roychowdhury, Thomas Kailath:
A Polynomial Time Algorithm for Reconfiguring Multiple-Track Models. IEEE Trans. Computers 42(4): 385-395 (1993) - [j8]Theodora A. Varvarigou, Vwani P. Roychowdhury, Thomas Kailath:
Reconfiguring Processor Arrays Using Multiple-Track Models: The 3-Track-1-Spare-Approach. IEEE Trans. Computers 42(11): 1281-1293 (1993) - [j7]Vwani P. Roychowdhury, Jonathan W. Greene, Abbas El Gamal:
Segmented channel routing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12(1): 79-95 (1993) - [c9]Theodora A. Varvarigou, Vwani P. Roychowdhury, Thomas Kailath:
Scheduling in and Out Forests in the Presence of Communication Delays. IPPS 1993: 222-229 - [c8]Vwani P. Roychowdhury, Kai-Yeung Siu:
Complexity Issues in Neural Computation and Learning. NIPS 1993: 1161-1162 - 1992
- [c7]Kai-Yeung Siu, Vwani P. Roychowdhury, Thomas Kailath:
Computing with Almost Optimal Size Neural Networks. NIPS 1992: 19-26 - [c6]Kai-Yeung Siu, Vwani P. Roychowdhury:
Optimal Depth Neural Networks for Multiplication and Related Problems. NIPS 1992: 59-64 - 1991
- [j6]Jehoshua Bruck, Vwani P. Roychowdhury:
How to Play Bowling in Parallel on the Grid. J. Algorithms 12(3): 516-529 (1991) - [j5]Kai-Yeung Siu, Vwani P. Roychowdhury, Thomas Kailath:
Depth-Size Tradeoffs for Neural Computation. IEEE Trans. Computers 40(12): 1402-1412 (1991) - [j4]Theodora A. Varvarigou, Vwani P. Roychowdhury, Thomas Kailath:
New algorithms for reconfiguring VLSI/WSI arrays. J. VLSI Signal Process. 3(4): 329-344 (1991) - [c5]Vwani P. Roychowdhury, Kai-Yeung Siu, Alon Orlitsky, Thomas Kailath:
A Geometric Approach to Threshold Circuit Complexity. COLT 1991: 97-111 - 1990
- [j3]Vwani P. Roychowdhury, Jehoshua Bruck, Thomas Kailath:
Efficient Algorithms for Reconfiguration in VLSI/WSI Arrays. IEEE Trans. Computers 39(4): 480-489 (1990) - [j2]Jehoshua Bruck, Vwani P. Roychowdhury:
On the number of spurious memories in the Hopfield model. IEEE Trans. Inf. Theory 36(2): 393-397 (1990) - [c4]Jonathan W. Greene, Vwani P. Roychowdhury, Sinan Kaptanoglu, Abbas El Gamal:
Segmented Channel Routing. DAC 1990: 567-572 - [c3]Vwani P. Roychowdhury, Alon Orlitsky, Kai-Yeung Siu, Thomas Kailath:
On the Circuit Complexity of Neural Networks. NIPS 1990: 953-959 - [c2]Vwani P. Roychowdhury, Jehoshua Bruck:
On Finding Non-Intersecting Paths in Grids and Its Application in Reconfiguring VLSI/WSI Arrays. SODA 1990: 454-464 - [c1]Vwani P. Roychowdhury, Thomas Kailath:
Study of Parallelism in Regular Iterative Algorithms. SPAA 1990: 367-376 - 1989
- [j1]Vwani P. Roychowdhury, Thomas Kailath:
Subspace scheduling and parallel implementation of non-systolic regular iterative algorithms. J. VLSI Signal Process. 1(2): 127-142 (1989)
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