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Muhammad E. S. Elrabaa
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2020 – today
- 2022
- [j19]Mahmoud Habboush, Aiman H. El-Maleh, Muhammad E. S. Elrabaa, Saleh Alsaleh:
DE-ZFP: An FPGA implementation of a modified ZFP compression/decompression algorithm. Microprocess. Microsystems 90: 104453 (2022) - [c10]Ayman Hroub, Muhammad E. S. Elrabaa:
SecSoC: A Secure System on Chip Architecture for IoT Devices. HOST 2022: 41-44 - 2021
- [j18]Muhammad E. S. Elrabaa, Mohammed Alasli, Marwan H. Abu-Amara:
Secure Computing Enclaves Using FPGAs. IEEE Trans. Dependable Secur. Comput. 18(2): 593-604 (2021)
2010 – 2019
- 2019
- [j17]Amran Al-Aghbari, Muhammad E. S. Elrabaa:
Cloud-Based FPGA Custom Computing Machines for Streaming Applications. IEEE Access 7: 38009-38019 (2019) - [j16]Mohammed Alasli, Muhammad E. S. Elrabaa, Marwan H. Abu-Amara:
FPGA-Based Symmetric Re-Encryption Scheme to Secure Data Processing for Cloud-Integrated Internet of Things. IEEE Internet Things J. 6(1): 446-457 (2019) - [j15]Muhammad E. S. Elrabaa, Mohamed A. Al-Asli, Marwan H. Abu-Amara:
A Protection and Pay-per-use Licensing Scheme for On-cloud FPGA Circuit IPs. ACM Trans. Reconfigurable Technol. Syst. 12(3): 13:1-13:19 (2019) - 2018
- [j14]Gamil A. Ahmed, Muhammad E. S. Elrabaa:
FBNoC: FPGA-based network on chip emulator for full-system architectural simulation of many-core systems. Microprocess. Microsystems 61: 72-85 (2018) - [j13]Amran Al-Aghbari, Muhammad E. S. Elrabaa:
A platform for FPGA virtualization in clouds and data centers. Microprocess. Microsystems 62: 61-71 (2018) - 2017
- [j12]Ayman Hroub, Muhammad E. S. Elrabaa, Muhamed F. Mudawar, Ahmad Khayyat:
Efficient Generation of Compact Execution Traces for Multicore Architectural Simulations. ACM Trans. Archit. Code Optim. 14(3): 27:1-27:25 (2017) - [j11]Muhammad E. S. Elrabaa, Ayman Hroub, Muhamed F. Mudawar, Amran Al-Aghbari, Mohammed Alasli, Ahmad Khayyat:
A Very Fast Trace-Driven Simulation Platform for Chip-Multiprocessors Architectural Explorations. IEEE Trans. Parallel Distributed Syst. 28(11): 3033-3045 (2017) - [j10]Ahmad T. Sheikh, Aiman H. El-Maleh, Muhammad E. S. Elrabaa, Sadiq M. Sait:
A Fault Tolerance Technique for Combinational Circuits Based on Selective-Transistor Redundancy. IEEE Trans. Very Large Scale Integr. Syst. 25(1): 224-237 (2017) - 2016
- [j9]Muhammad E. S. Elrabaa, Amran Al-Aghbari, Mohammed Alasli, Aiman El-Maleh, Abdelhafid Bouhraoua, Mohammad R. Alshayeb:
A low-cost platform for the prototyping and characterization of digital circuit IPs. Integr. 54: 1-9 (2016) - 2015
- [j8]Mohammad R. Alshayeb, Muhammad E. S. Elrabaa, Ayman Hroub, Amran Al-Aghbari, Aiman H. El-Maleh, Abdelhafid Bouhraoua:
Towards a Test Definition Language for Integrated Circuits. J. Circuits Syst. Comput. 24(3): 1550027:1-1550027:19 (2015) - 2014
- [j7]Muhammad E. S. Elrabaa:
A portable high-frequency digitally controlled oscillator (DCO). Integr. 47(3): 339-346 (2014) - [j6]Muhammad E. S. Elrabaa, Abdelhafid Bouhraoua:
Buffer Engineering for modified Fat Tree NoCs for Many-Core Systems-on-Chip. J. Circuits Syst. Comput. 23(7) (2014) - 2013
- [c9]Muhammad E. S. Elrabaa:
A portable high-frequency digitally controlled oscillator (DCO). ACM Great Lakes Symposium on VLSI 2013: 77-82 - 2011
- [j5]Abdelhafid Bouhraoua, Muhammad E. S. Elrabaa:
Improved Modified Fat-Tree Topology Network-on-Chip. J. Circuits Syst. Comput. 20(4): 757-780 (2011) - [j4]Muhammad E. S. Elrabaa, Abdelhafid Bouhraoua:
A hardwired NoC infrastructure for embedded systems on FPGAs. Microprocess. Microsystems 35(2): 200-216 (2011) - [j3]Muhammad E. S. Elrabaa:
Robust Two-Phase RZ Asynchronous SoC Interconnects. IEEE Trans. Very Large Scale Integr. Syst. 19(6): 1086-1089 (2011) - 2010
- [c8]Abdelhafid Bouhraoua, Muhammad E. S. Elrabaa:
A New Client Interface Architecture for the Modified Fat Tree (MFT) Network-on-Chip (NoC) Topology. ReCoSoC 2010: 169-172
2000 – 2009
- 2008
- [c7]Abdelhafid Bouhraoua, Muhammad E. S. Elrabaa:
Addressing Heterogeneous Bandwidth Requirements in Modified Fat-Tree Networks-on-Chips. DELTA 2008: 486-490 - [c6]Muhammad E. S. Elrabaa:
A two-phase return-to-zero (RZ) asynchronous transceiver circuit for pipe-lined SoC interconnects. SoC 2008: 1-4 - 2006
- [c5]Muhammad E. S. Elrabaa:
An All-Digital Clock Frequency Caputring Circuitry For NRZ Data Communications. ICECS 2006: 106-109 - [c4]Abdelhafid Bouhraoua, Muhammad E. S. Elrabaa:
A High-Throughput Network-on-Chip Architecture for Systems-on-Chip Interconnect. SoC 2006: 1-4 - 2003
- [c3]Muhammad E. S. Elrabaa:
A new static differential CMOS logic with superior low power performance. ICECS 2003: 810-813 - 2001
- [c2]Muhammad E. S. Elrabaa, Mohamed I. Elmasry:
Split-Gate Logic circuits for multi-threshold technologies. ISCAS (4) 2001: 798-801 - 2000
- [c1]Muhammad E. S. Elrabaa, Mohab H. Anis, Mohamed I. Elmasry:
A contention-free domino logic for scaled-down CMOS technologies with ultra low threshold voltages. ISCAS 2000: 748-751
1990 – 1999
- 1997
- [j2]Muhammad E. S. Elrabaa, Mohamed I. Elmasry, Duljit S. Malhi:
Low-power BiCMOS circuits for high-speed interchip communication. IEEE J. Solid State Circuits 32(4): 604-609 (1997) - 1994
- [j1]Muhammad E. S. Elrabaa, Michael S. Obrecht, Mohamed I. Elmasry:
Novel low-voltage low-power full-swing BiCMOS circuits. IEEE J. Solid State Circuits 29(2): 86-94 (1994)
Coauthor Index
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