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Hiroaki Matsushita
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2010 – 2019
- 2015
- [c4]Mitsuhiko Igarashi, Kan Takeuchi, Takeshi Okagaki, Koji Shibutani, Hiroaki Matsushita, Koji Nii:
An on-die digital aging monitor against HCI and xBTI in 16 nm Fin-FET bulk CMOS technology. ESSCIRC 2015: 112-115 - 2013
- [j2]Kan Takeuchi, Masaki Shimada, Takao Sato, Yusaku Katsuki, Hiroumi Yoshikawa, Hiroaki Matsushita:
Spatial Distribution Measurement of Dynamic Voltage Drop Caused by Pulse and Periodic Injection of Spot Noise. IEEE Trans. Very Large Scale Integr. Syst. 21(1): 164-168 (2013) - 2012
- [c3]Mitsuhiko Igarashi, Kan Takeuchi, Yoshio Takazawa, Yasuto Igarashi, Hiroaki Matsushita:
28-nm HKMG GHz digital sensor for detecting dynamic voltage drops in testing for peak power optimization. CICC 2012: 1-4
2000 – 2009
- 2008
- [j1]Kan Takeuchi, Atsushi Yoshikawa, Michio Komoda, Ken Kotani, Hiroaki Matsushita, Yusaku Katsuki, YuyoYamamoto, Takao Sato:
Clock-Skew Test Module for Exploring Reliable Clock-Distribution Under Process and Global Voltage-Temperature Variations. IEEE Trans. Very Large Scale Integr. Syst. 16(11): 1559-1566 (2008) - [c2]Genichi Tanaka, Kan Takeuchi, Minoru Ito, Hiroaki Matsushita:
A voltage drop aware crosstalk measurement with multi-aggressors in 65nm process. CICC 2008: 37-40 - [c1]Kan Takeuchi, Genichi Tanaka, Hiroaki Matsushita, Kenichi Yoshizumi, Yusaku Katsuki, Takao Sato:
Observations of Supply-Voltage-Noise Dispersion in Sub-nsec. ITC 2008: 1-8
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