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2020 – today
- 2024
[c11]Himanshu
, Kaushik Saha, Payali Das, Swades De:
A Network Segmentation Architecture for Flow Aggregation and DDoS Mitigation in SDN Using RAPID Flow Rules. ICDCN 2024: 232-241- 2023
- [j3]Sudeshna Biswas, Himanshu, Sushmita Ghosh, Payali Das, Kaushik Saha, Swades De:
Efficient Data Transfer Mechanism for DLMS/COSEM Enabled Smart Energy Metering Platform. SIGMETRICS Perform. Evaluation Rev. 50(4): 14-16 (2023) - [c10]Rajdeep Choudhury, Akash Kumar Mandal, Swades De, Kaushik Saha, Ranjan K. Mallik:
DC Signature Analysis Aided Power Source Identification. ICIIS 2023: 299-304
2010 – 2019
- 2016
- [j2]Pushpendra Singh, Shiv Dutt Joshi, Rakesh Kumar Patney, Kaushik Saha:
Fourier-Based Feature Extraction for Classification of EEG Signals Using EEG Rhythms. Circuits Syst. Signal Process. 35(10): 3700-3715 (2016) - [c9]Ashish Kumar, G. S. Visweswaran, Vinay Kumar, Kaushik Saha:
A 0.5V VMIN 6T SRAM in 28nm UTBB FDSOI Technology Using Compensated WLUD Scheme with Zero Performance Loss. VLSID 2016: 191-195 - 2015
- [c8]Ashish Kumar, G. S. Visweswaran, Kaushik Saha:
Low voltage error resilient SRAM using run-time error detection and correction. ESSCIRC 2015: 335-338 - [c7]Ashish Kumar, Vinay Kumar, Dhori Kedar Janardan, G. S. Visweswaran, Kaushik Saha:
A 6T-SRAM in 28nm FDSOI technology with Vmin of 0.52V using assisted read and write operation. ICICDT 2015: 1-4 - [i2]Pushpendra Singh, Shiv Dutt Joshi, Rakesh Kumar Patney, Kaushik Saha:
The Fourier Decomposition Method for nonlinear and nonstationary time series analysis. CoRR abs/1503.06675 (2015) - [i1]Pushpendra Singh, Shiv Dutt Joshi, Rakesh Kumar Patney, Kaushik Saha:
The Hilbert spectrum and the Energy Preserving Empirical Mode Decomposition. CoRR abs/1504.04104 (2015) - 2014
- [j1]Pushpendra Singh, Shiv Dutt Joshi, Rakesh Kumar Patney, Kaushik Saha:
Some studies on nonpolynomial interpolation and error analysis. Appl. Math. Comput. 244: 809-821 (2014) - 2013
- [c6]Chaitanya Gunta, Shazeb N. Khan, Kaushik Saha, Danilo Pietro Pau:
Acceleration of SVD routines in LAPACK. EUROCON 2013: 1733-1737 - [c5]Harijot Singh Bindra, Shouri Chatterjee, Kaushik Saha, Taranjit Kukal:
Clock and data recovery module in 90nm for 10Gbps serial link with -18dB channel attenuation. ISCAS 2013: 2472-2475 - [c4]Prashant Dubey, Atul Kumar Kashyap, Navneet Gupta, Kaushik Saha:
PODIA: Power Optimization through Differential Imbalanced Amplifier. VLSI Design 2013: 125-129 - 2012
- [c3]Bruno Jego, Mathieu Robart, Kaushik Saha, Danilo Pietro Pau:
FAST detector on many-core computers. ICCE-Berlin 2012: 263-266
2000 – 2009
- 2009
- [c2]Srijib Narayan Maiti, Amit Gupta, Emiliano Mario Piccinelli, Kaushik Saha:
Real-time SVC Decoder in Embedded System. SIGMAP 2009: 5-8 - 2006
- [c1]Giuseppe Desoli, Thierry Strudel, Jean-Philippe Cousin, Kaushik Saha:
Current and future trends in embedded VLIW microprocessors applied to multimedia and signal processing. EUSIPCO 2006: 1-5
Coauthor Index
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