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Shen Lin 0001
Person information
- affiliation: IBM T. J. Watson Research Center, Yorktown Heights, NY, USA
- affiliation (former): University of California, Berkeley, Department of Electrical Engineering and Computer Sciences, CA, USA
Other persons with the same name
- Shen Lin — disambiguation page
- Shen Lin 0002 — Nanjing University of Science and Technology, China
- Shen Lin 0003 — SAP Labs, China (and 1 more)
- Shen Lin 0004 — Tsinghua University, Beijing, China
- Shen Lin 0005 — Bell Laboratories, Murray Hill, NJ, USA
- Shen Lin 0006 — Xidian University, State Key Laboratory of Integrated Service Networks (ISN), Xi'an, China
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1990 – 1999
- 1995
- [c9]Premal Buch, Shen Lin, Vijay Nagasamy, Ernest S. Kuh:
Techniques for fast circuit simulation applied to power estimation of CMOS circuits. ISLPD 1995: 135-138 - 1993
- [j1]Shen Lin, Ernest S. Kuh, Malgorzata Marek-Sadowska:
Stepwise equivalent conductance circuit simulation technique. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12(5): 672-683 (1993) - [c8]Shen Lin, Ernest S. Kuh:
Circuit simulation for large interconnected IC networks. VLSI 1993: 333-342 - 1992
- [c7]Shen Lin, Ernest S. Kuh:
Transient Simulation of Lossy Interconnect. DAC 1992: 81-86 - [c6]Shen Lin, Ernest S. Kuh:
Transient simulation of lossy coupled transmission lines. EURO-DAC 1992: 126-131 - [c5]Shen Lin, Ernest S. Kuh, Malgorzata Marek-Sadowska:
A New Accurate and Efficient Timing Simulator. VLSI Design 1992: 281-286 - 1991
- [c4]Shen Lin, Malgorzata Marek-Sadowska, Ernest S. Kuh:
SWEC: a Step Wise Equivalent Conductance timing simulator for CMOS VLSI circuits. EURO-DAC 1991: 142-148 - [c3]Shen Lin, Malgorzata Marek-Sadowska:
A fast and efficient algorithm for determining fanout trees in large networks. EURO-DAC 1991: 539-544 - 1990
- [c2]Shen Lin, Malgorzata Marek-Sadowska, Ernest S. Kuh:
Delay and Area Optimization in Standard-Cell Design. DAC 1990: 349-352
1980 – 1989
- 1989
- [c1]Malgorzata Marek-Sadowska, Shen Lin:
Timing driven placement. ICCAD 1989: 94-97
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