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ORCIDWoonyun Kim
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2010 – 2019
- 2014
[j6]Woonyun Kim, Ki Seok Yang, Jeonghu Han, Jaejoon Chang, Chang-Ho Lee:
An EDGE/GSM Quad-Band CMOS Power Amplifier. IEEE J. Solid State Circuits 49(10): 2141-2149 (2014)- 2012
- [j5]Jihwan Kim, Woonyun Kim, Hamhee Jeon, Yan-Yu Huang, Youngchang Yoon, Hyungwook Kim, Chang-Ho Lee, Kevin T. Kornegay
:
A Fully-Integrated High-Power Linear CMOS Power Amplifier With a Parallel-Series Combining Transformer. IEEE J. Solid State Circuits 47(3): 599-614 (2012) - [j4]Jaehyouk Choi, Woonyun Kim, Kyutae Lim:
A Spur Suppression Technique Using an Edge-Interpolator for a Charge-Pump PLL. IEEE Trans. Very Large Scale Integr. Syst. 20(5): 969-973 (2012) - 2011
- [j3]Jihwan Kim, Youngchang Yoon, Hyungwook Kim, Kyu Hwan An, Woonyun Kim, Hyun-Woong Kim, Chang-Ho Lee, Kevin T. Kornegay:
A Linear Multi-Mode CMOS Power Amplifier With Discrete Resizing and Concurrent Power Combining Structure. IEEE J. Solid State Circuits 46(5): 1034-1048 (2011) - [j2]Jaehyouk Choi, Stephen T. Kim, Woonyun Kim, Kwan-Woo Kim, Kyutae Lim, Joy Laskar:
A Low Power and Wide Range Programmable Clock Generator With a High Multiplication Factor. IEEE Trans. Very Large Scale Integr. Syst. 19(4): 701-705 (2011) - [c3]Woonyun Kim, Ki Seok Yang, Jeonghu Han, Jaejoon Chang, Chang-Ho Lee:
An EDGE/GSM quad-band CMOS power amplifier. ISSCC 2011: 430-432
2000 – 2009
- 2009
- [c2]Sanghyun Woo, Woonyun Kim, Chang-Ho Lee, Kyutae Lim, Joy Laskar:
A 3.6mW differential common-gate CMOS LNA with positive-negative feedback. ISSCC 2009: 218-219 - 2006
- [j1]Woonyun Kim, Sung-Gi Yang, Jinhyuck Yu, Heeseon Shin, Woo-Seung Choo, Byeong-Ha Park:
A direct conversion receiver with an IP2 calibrator for CDMA/PCS/GPS/AMPS applications. IEEE J. Solid State Circuits 41(7): 1535-1541 (2006) - 2005
- [c1]Woonyun Kim, Sung-Gi Yang, Yeon-kug Moon, Jinhyuck Yu, Heeseon Shin, Woo-Seung Choo, Byeong-Ha Park:
IP2 calibrator using common mode feedback circuitry. ESSCIRC 2005: 231-234
Coauthor Index
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