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Tadaaki Bandoh
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2000 – 2009
- 2002
- [c9]Damien Le Moal, Tadashi Takeuchi, Tadaaki Bandoh:
Cost-effective streaming server implementation using Hi-tactix. ACM Multimedia 2002: 382-391
1990 – 1999
- 1994
- [j3]Fumio Murabayashi, Takashi Hotta, Shigeya Tanaka, Tatsumi Yamauchi, Hiromichi Yamada, Tetsuo Nakano, Yutaka Kobayashi, Tadaaki Bandoh:
3.3-V BiCMOS circuit techniques for a 120-MHz RISC microprocessor. IEEE J. Solid State Circuits 29(3): 298-302 (1994) - [j2]Shigeya Tanaka, Takashi Hotta, Fumio Murabayashi, Hiromichi Yamada, Shoji Yoshida, Kotaro Shimamura, Koyo Katsura, Tadaaki Bandoh, Koichi Ikeda, Kenji Matsubara, Kouji Saitou, Tetsuo Nakano, Teruhisa Shimizu, Ryuichi Satomura:
A 120-MHz BiCMOS superscalar RISC processor. IEEE J. Solid State Circuits 29(4): 389-396 (1994) - 1992
- [c8]Miyako Odawara, Kazunori Kuriyama, Tadaaki Bandoh:
Archimedes: An Approach to Architecutre-Independent Modeling for High-Level Simulation. ICCD 1992: 249-254
1980 – 1989
- 1989
- [c7]Hideo Maejima, Tadaaki Bandoh, Yoji Nishio, Tadashi Fukushima, Masanori Odaka, Atsuo Hotta:
Circuit technologies for BiCMOS VLSI's as computer elements. ICCD 1989: 318-321 - [c6]Yasuhiro Nakatsuka, Takashi Hotta, Shigeya Tanaka, Tadaaki Bandoh, Ryuichi Satomura, Syuichi Nakagami, Tetsuo Nakano, Atsuo Hotta, Takashi Moriyama, Shigemi Adachi, Shoji Iwamoto:
A high performance BiCMOS 32-bit microprocessor. ICCD 1989: 358-361 - 1988
- [c5]Ken-ichi Kurosawa, S. Yamaguchi, Shigeo Abe, Tadaaki Bandoh:
Instruction Architecture for a High Performance Integrated Prolog Processor IPP. ICLP/SLP 1988: 1506-1530 - 1987
- [c4]S. Yamaguchi, Tadaaki Bandoh, K. Kurosawa, M. Morioka:
Architecture of high performance integrated Prolog processor IPP. FJCC 1987: 175-182 - [c3]Shigeo Abe
, Tadaaki Bandoh, S. Yamaguchi, Ken-ichi Kurosawa, Kaori Kiriyama:
High Performance Integrated Prolog Processor IPP. ISCA 1987: 100-107 - 1985
- [j1]Hidekazu Matsumoto, Tadaaki Bandoh, Kotaro Hirasawa, Takeshi Kato:
A high-performance architecture for variable length instructions. Syst. Comput. Jpn. 16(3): 19-28 (1985) - 1982
- [c2]Yasushi Fukunaga, Tadaaki Bandoh, Kotaro Hirasawa, Tetsuya Kawakami, Takeshi Kato, Jushi Ide Hitachi:
Performance Analysis of Bus Structure in a Multiprocessor System. COMPCON 1982: 98-104 - [c1]Shigeo Abe, Ryosei Hiraoka, Yasushi Fukunaga, Tadaaki Bandoh, Kotaro Hirasawa, Yukio Kawamoto:
Preliminary Performance Evaluation of Data Flow Computers. COMPCON 1982: 224-227
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