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ORCIDRadoslaw Szymanek
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2010 – 2019
- 2017
[j2]Simon Bliudze
, Anastasia Mavridou, Radoslaw Szymanek, Alina Zolotukhina:
Exogenous coordination of concurrent software components with JavaBIP. Softw. Pract. Exp. 47(11): 1801-1836 (2017)- 2014
- [c14]Simon Bliudze, Anastasia Mavridou, Radoslaw Szymanek, Alina Zolotukhina:
Coordination of software components with BIP: application to OSGi. MiSE 2014: 25-30 - 2011
- [j1]Graeme Gange, Peter J. Stuckey, Radoslaw Szymanek:
MDD propagators with explanation. Constraints An Int. J. 16(4): 407-429 (2011) - [c13]Robin Steiger, Willem Jan van Hoeve, Radoslaw Szymanek:
An efficient generic network flow constraint. SAC 2011: 893-900 - 2010
- [c12]Yuri Malitsky, Meinolf Sellmann, Radoslaw Szymanek:
Filtering Bounded Knapsack Constraints in Expected Sublinear Time. AAAI 2010: 141-146
2000 – 2009
- 2008
- [c11]Radoslaw Szymanek, Christophe Lecoutre:
Constraint-Level Advice for Shaving. ICLP 2008: 636-650 - 2007
- [c10]Mats Petter Pettersson, Radoslaw Szymanek, Krzysztof Kuchcinski:
A CP-LP approach to network management in OSPF routing. SAC 2007: 311-315 - 2006
- [c9]Christophe Lecoutre, Radoslaw Szymanek:
Generalized Arc Consistency for Positive Table Constraints. CP 2006: 284-298 - [c8]Radoslaw Szymanek, Barry O'Sullivan:
Guiding Search Using Constraint-Level Advice. ECAI 2006: 158-162 - 2004
- [b1]Radoslaw Szymanek:
Constraint-Driven Design Space Exploration for Memory-Dominated Embedded Systems. Lund University, Sweden, 2004 - [c7]Radoslaw Szymanek, Francky Catthoor, Krzysztof Kuchcinski:
Time-Energy Design Space Exploration for Multi-Layer Memory Architectures. DATE 2004: 318-323 - [c6]Radoslaw Szymanek, Francky Catthoor, Krzysztof Kuchcinski:
Data assignment and access scheduling exploration for multi-layer memory architectures. ESTIMedia 2004: 61-66 - 2003
- [c5]Radoslaw Szymanek, Krzysztof Kuchcinski:
Partial task assignment of task graphs under heterogeneous resource constraints. DAC 2003: 244-249 - 2001
- [c4]Radoslaw Szymanek, Krzysztof Kuchcinski:
A constructive algorithm for memory-aware task assignment and scheduling. CODES 2001: 147-152 - 2000
- [c3]Radoslaw Szymanek, Krzysztof Kuchcinski:
Task Assignment and Scheduling under Memory Constraints. EUROMICRO 2000: 1084-1090 - [c2]Radoslaw Szymanek, Flavius Gruian, Krzysztof Kuchcinski:
Digital Systems Design Using Constraint Logic Programming. PACPL 2000: 149-166
1990 – 1999
- 1999
- [c1]Radoslaw Szymanek, Krzysztof Kuchcinski:
Design Space Exploration in System Level Synthesis under Memory Constraints. EUROMICRO 1999: 1029-
Coauthor Index
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