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2020 – today
- 2024
[j4]Chenyang Zhao
, Jinbei Fang, Xiaoli Huang, Deyang Chen, Zhiwang Guo, Jingwen Jiang, Jiawei Wang, Jianguo Yang, Jun Han, Peng Zhou, Xiaoyong Xue, Xiaoyang Zeng:
A 28-nm 36 Kb SRAM CIM Engine With 0.173 μm2 4T1T Cell and Self-Load-0 Weight Update for AI Inference and Training Applications. IEEE J. Solid State Circuits 59(10): 3277-3289 (2024)- 2023
- [j3]Deyang Chen, Zhiwang Guo, Jinbei Fang, Chenyang Zhao, Jingwen Jiang, Keji Zhou, Haidong Tian, Xiankui Xiong, Xiaoyong Xue, Xiaoyang Zeng:
A 1T2R1C ReRAM CIM Accelerator With Energy-Efficient Voltage Division and Capacitive Coupling for CNN Acceleration in AI Edge Applications. IEEE Trans. Circuits Syst. II Express Briefs 70(1): 276-280 (2023) - [j2]Zhiwang Guo, Deyang Chen, Chenyang Zhao, Jinbei Fang, Jingwen Jiang, Yixuan Liu, Haidong Tian, Xiankui Xiong, Keji Zhou, Xiaoyong Xue, Qi Liu, Xiaoyang Zeng:
An Emerging NVM CIM Accelerator With Shared-Path Transpose Read and Bit-Interleaving Weight Storage for Efficient On-Chip Training in Edge Devices. IEEE Trans. Circuits Syst. II Express Briefs 70(7): 2645-2649 (2023) - 2022
- [j1]Keji Zhou, Ruijun Lin, Zhiwang Guo, Yixuan Liu, Jingwen Jiang, Chenyang Zhao, Jinbei Fang, Xiaoxin Xu, Xiaoyong Xue, Xiaoyang Zeng:
A 2D2R ReRAM CIM accelerator for multilayer perceptron in visual classification applications. Microelectron. J. 125: 105478 (2022) - 2021
- [c2]Zhiwang Guo, Deyang Chen, Xiaoyong Xue:
Algorithm/Hardware Co-Design Configurable SAR ADC with Low Power for Computing-in-Memory in 28nm CMOS. ASICON 2021: 1-4 - [c1]Chenyang Zhao, Jinbei Fang, Jingwen Jiang, Zhiwang Guo, Xiaoyong Xue, Xiaoyang Zeng:
Intra-array Non-Idealities Modeling and Algorithm Optimization for RRAM-based Computing-in-Memory Applications. ASICON 2021: 1-4
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