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ORCIDPablo Ibáñez 0001
Person information
- affiliation: University of Zaragoza, Spain
Other persons with the same name
- Pablo Ibáñez 0002 — University of the Republic, Montevideo, Uruguay
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Journal Articles
- 2024
[j20]Lorién López-Villellas
, Rubén Langarita-Benítez, Asaf Badouh, Víctor Soria Pardos, Quim Aguado-Puig, Guillem López-Paradís, Max Doblas, Javier Setoain, Chulho Kim, Makoto Ono, Adrià Armejach, Santiago Marco-Sola, Jesús Alastruey-Benedé, Pablo Ibáñez, Miquel Moretó:
GenArchBench: A genomics benchmark suite for arm HPC processors. Future Gener. Comput. Syst. 157: 313-329 (2024)- 2023
- [j19]Lorién López-Villellas, Carl Christian Kjelgaard Mikkelsen, Juan José Galano-Frutos, Santiago Marco-Sola, Jesús Alastruey-Benedé, Pablo Ibáñez, Miquel Moretó, Javier Sancho, Pablo García-Risueño:
Accurate and efficient constrained molecular dynamics of polymers using Newton's method and special purpose code. Comput. Phys. Commun. 288: 108742 (2023) - [j18]Rubén Langarita, Adrià Armejach, Pablo Ibáñez, Jesús Alastruey-Benedé, Miquel Moretó:
Porting and Optimizing BWA-MEM2 Using the Fujitsu A64FX Processor. IEEE ACM Trans. Comput. Biol. Bioinform. 20(5): 3139-3153 (2023) - [j17]Agustín Navarro-Torres, Jesús Alastruey-Benedé, Pablo Ibáñez, Víctor Viñals Yúfera:
BALANCER: bandwidth allocation and cache partitioning for multicore processors. J. Supercomput. 79(9): 10252-10276 (2023) - 2022
- [j16]Rubén Langarita, Adrià Armejach, Javier Setoain, Pablo Ibáñez-Marín, Jesús Alastruey-Benedé, Miquel Moretó:
Compressed Sparse FM-Index: Fast Sequence Alignment Using Large K-Steps. IEEE ACM Trans. Comput. Biol. Bioinform. 19(1): 355-368 (2022) - 2021
- [j15]Alejandro Valero, Ruben Gran Tejero, Darío Suárez Gracia, Emanuel A. Georgescu, Joaquín Ezpeleta, Pedro Álvarez, Adolfo Muñoz, Luis M. Ramos, Pablo Ibáñez:
A learning experience toward the understanding of abstraction-level interactions in parallel applications. J. Parallel Distributed Comput. 156: 38-52 (2021) - [j14]Javier Díaz, Pablo Ibáñez, Teresa Monreal, Víctor Viñals, José M. Llabería:
Near-optimal replacement policies for shared caches in multicore processors. J. Supercomput. 77(10): 11756-11785 (2021) - 2020
- [j13]Jose Manuel Herruzo, Sonia González-Navarro, Pablo Ibáñez-Marín, Víctor Viñals Yúfera, Jesús Alastruey-Benedé, Oscar G. Plata:
Accelerating Sequence Alignments Based on FM-Index Using the Intel KNL Processor. IEEE ACM Trans. Comput. Biol. Bioinform. 17(4): 1093-1104 (2020) - 2019
- [j12]Alexandra Ferrerón-Labari, Jesús Alastruey-Benedé, Darío Suárez Gracia, Teresa Monreal Arnal, Pablo Ibáñez-Marín, Víctor Viñals Yúfera:
A fault-tolerant last level cache for CMPs operating at ultra-low voltage. J. Parallel Distributed Comput. 125: 31-44 (2019) - [j11]Javier Díaz, Teresa Monreal, Pablo Ibáñez, José M. Llabería, Víctor Viñals:
ReD: A reuse detector for content selection in exclusive shared last-level caches. J. Parallel Distributed Comput. 125: 106-120 (2019) - 2018
- [j10]Roberto Rodríguez-Rodríguez, Javier Díaz, Fernando Castro, Pablo Ibáñez, Daniel Chaver, Víctor Viñals, Juan Carlos Saez, Manuel Prieto-Matías, Luis Piñuel, Teresa Monreal Arnal, José María Llabería:
Reuse Detector: Improving the Management of STT-RAM SLLCs. Comput. J. 61(6): 856-880 (2018) - 2016
- [j9]Alexandra Ferrerón-Labari, Darío Suárez Gracia, Jesús Alastruey-Benedé, Teresa Monreal Arnal, Pablo Ibáñez:
Concertina: Squeezing in Cache Content to Operate at Near-Threshold Voltage. IEEE Trans. Computers 65(3): 755-769 (2016) - 2013
- [j8]Jorge Albericio, Pablo Ibáñez, Víctor Viñals, José María Llabería:
Exploiting reuse locality on inclusive shared last-level caches. ACM Trans. Archit. Code Optim. 9(4): 38:1-38:19 (2013) - 2012
- [j7]Benjamín Sahelices, Agustín De Dios Hernández, Pablo Ibáñez, Víctor Viñals Yúfera, José María Llabería:
Effcient Handling of Lock Hand-off in DSM Multiprocessors with Buffering Coherence Controllers. J. Comput. Sci. Technol. 27(1): 75-91 (2012) - [j6]Jorge Albericio, Ruben Gran Tejero, Pablo Ibáñez, Víctor Viñals, José María Llabería:
ABS: A low-cost adaptive controller for prefetching in a banked shared last-level cache. ACM Trans. Archit. Code Optim. 8(4): 19:1-19:20 (2012) - 2011
- [j5]Luis M. Ramos, José Luis Briz, Pablo E. Ibáñez, Víctor Viñals:
Multi-level Adaptive Prefetching based on Performance Gradient Tracking. J. Instr. Level Parallelism 13 (2011) - [j4]Ana Bosque, Víctor Viñals, Pablo Ibáñez, José M. Llabería:
Filtering directory lookups in CMPs. Microprocess. Microsystems 35(8): 695-707 (2011) - 2009
- [j3]Enrique F. Torres, Pablo Ibáñez, Víctor Viñals Yúfera, José María Llabería:
Store Buffer Design for Multibanked Data Caches. IEEE Trans. Computers 58(10): 1307-1320 (2009) - 2007
- [j2]Luis M. Ramos, José Luis Briz, Pablo E. Ibáñez, Víctor Viñals:
Data prefetching in a cache hierarchy with high bandwidth and capacity. SIGARCH Comput. Archit. News 35(4): 37-44 (2007) - 2006
- [j1]Jesús Alastruey, José Luis Briz, Pablo Ibáñez, Víctor Viñals:
Software Demand, Hardware Supply. IEEE Micro 26(4): 72-82 (2006)
Conference and Workshop Papers
- 2023
- [c24]Lorién López-Villellas, Esteve Pineda-Sánchez, Asaf Badouh, Santiago Marco-Sola, Pablo Ibáñez, Jesús Alastruey-Benedé, Miquel Moretó:
RISC-V for Genome Data Analysis: Opportunities and Challenges. DCIS 2023: 1-6 - [c23]Carlos Escuin, Asif Ali Khan, Pablo Ibáñez, Teresa Monreal, Jerónimo Castrillón, Víctor Viñals:
Compression-Aware and Performance-Efficient Insertion Policies for Long-Lasting Hybrid LLCs. HPCA 2023: 179-192 - [c22]Carlos Escuin, Fernando García-Redondo, Mahdi Zahedi, Pablo Ibáñez, Teresa Monreal, Víctor Viñals, José María Llabería, James Myers, Julien Ryckaert, Dwaipayan Biswas, Francky Catthoor:
MNEMOSENE++: Scalable Multi-Tile Design with Enhanced Buffering and VGSOT-MRAM based Compute-in-Memory Crossbar Array. ICECS 2023: 1-5 - 2022
- [c21]Carlos Escuin, Asif Ali Khan, Pablo Ibáñez, Teresa Monreal, Víctor Viñals, Jerónimo Castrillón:
HyCSim: A rapid design space exploration tool for emerging hybrid last-level caches. DroneSE/RAPIDO@HiPEAC 2022: 53-58 - [c20]Agustín Navarro-Torres, Biswabandan Panda, Jesús Alastruey-Benedé, Pablo Ibáñez, Víctor Viñals Yúfera, Alberto Ros:
Berti: an Accurate Local-Delta Data Prefetcher. MICRO 2022: 975-991 - 2021
- [c19]Agustín Navarro-Torres, Jesús Alastruey-Benedé, Pablo Ibáñez-Marín, Maria Carpen-Amarie:
Synchronization Strategies on Many-Core SMT Systems. SBAC-PAD 2021: 54-63 - 2019
- [c18]Jose Manuel Herruzo, Sonia González-Navarro, Pablo Ibáñez, Víctor Viñals, Jesús Alastruey-Benedé, Oscar G. Plata:
Boosting Backward Search Throughput for FM-Index Using a Compressed Encoding. DCC 2019: 577 - [c17]Alejandro Valero, Darío Suárez Gracia, Ruben Gran Tejero, Luis M. Ramos, Agustín Navarro-Torres, Adolfo Muñoz, Joaquín Ezpeleta, José Luis Briz, Ana C. Murillo, Eduardo Montijano, Javier Resano, María Villarroya-Gaudó, Jesús Alastruey-Benedé, Enrique F. Torres, Pedro Álvarez, Pablo Ibáñez, Víctor Viñals:
Exposing Abstraction-Level Interactions with a Parallel Ray Tracer. WCAE@ISCA 2019: 5:1-5:8 - 2015
- [c16]Carl Christian Kjelgaard Mikkelsen, Jesús Alastruey-Benedé, Pablo Ibáñez-Marín, Pablo García-Risueño:
Accelerating Sparse Arithmetic in the Context of Newton's Method for Small Molecules with Bond Constraints. PPAM (1) 2015: 160-171 - 2013
- [c15]Jorge Albericio, Pablo Ibáñez, Víctor Viñals, José M. Llabería:
The reuse cache: downsizing the shared last-level cache. MICRO 2013: 310-321 - 2011
- [c14]Ana Bosque, Víctor Viñals, Pablo Ibáñez, José María Llabería:
Filtering Directory Lookups in CMPs with Write-Through Caches. Euro-Par (1) 2011: 269-281 - 2010
- [c13]Ana Bosque, Víctor Viñals, Pablo Ibáñez, José M. Llabería:
Filtering Directory Lookups in CMPs. DSD 2010: 207-216 - 2009
- [c12]Benjamín Sahelices, Pablo Ibáñez, Víctor Viñals, José María Llabería:
A Methodology to Characterize Critical Section Bottlenecks in DSM Multiprocessors. Euro-Par 2009: 149-161 - 2008
- [c11]Luis M. Ramos, José Luis Briz, Pablo E. Ibáñez, Víctor Viñals:
Low-Cost Adaptive Data Prefetching. Euro-Par 2008: 327-336 - 2007
- [c10]Ana Bosque, Pablo Ibáñez, Víctor Viñals, Per Stenström, José María Llabería:
Characterization of Apache web server with Specweb2005. MEDEA@PACT 2007: 65-72 - 2006
- [c9]Agustín De Dios Hernández, Benjamín Sahelices Fernández, Pablo Ibáñez, Víctor Viñals, José M. Llabería:
Speeding-Up Synchronizations in DSM Multiprocessors. Euro-Par 2006: 473-484 - [c8]Luis M. Ramos, José Luis Briz, Pablo E. Ibáñez, Víctor Viñals:
Data prefetching in a cache hierarchy with high bandwidth and capacity. MEDEA@PACT 2006: 37-44 - 2005
- [c7]Enrique F. Torres, Pablo Ibáñez, Víctor Viñals, José María Llabería:
Store Buffer Design in First-Level Multibanked Data Caches. ISCA 2005: 469-480 - 2004
- [c6]Enrique F. Torres, Pablo Ibáñez, Víctor Viñals, José María Llabería:
Contents Management in First-Level Multibanked Data Caches. Euro-Par 2004: 516-524 - 2003
- [c5]Enrique F. Torres, Pablo Ibáñez, Víctor Viñals, José María Llabería:
Counteracting Bank Misprediction in Sliced First-Level Caches. Euro-Par 2003: 586-596 - 2001
- [c4]María Jesús Garzarán, José Luis Briz, Pablo E. Ibáñez, Víctor Viñals:
Hardware Prefetching in Bus-Based Multiprocessors: Pattern Characterization and Cost-Effective Hardware. PDP 2001: 345-354 - 2000
- [c3]Luis M. Ramos, Pablo E. Ibáñez, Víctor Viñals, José M. Llabería:
Modeling load address behaviour through recurrences. ISPASS 2000: 101-108 - 1998
- [c2]Pablo Ibáñez, Víctor Viñals, José Luis Briz, María Jesús Garzarán:
Characterization and Improvement of Load/Store Cache-based Prefetching. International Conference on Supercomputing 1998: 369-376 - 1996
- [c1]Pablo Ibáñez, Víctor Viñals:
Performance Assessment of Contents Management in Multilevel On-Chip Caches. EUROMICRO 1996: 431-440
Informal and Other Publications
- 2024
- [i4]Roberto Rodríguez-Rodríguez, Javier Díaz, Fernando Castro, Pablo Ibáñez, Daniel Chaver, Víctor Viñals, Juan Carlos Saez, Manuel Prieto-Matías, Luis Piñuel, Teresa Monreal, José María Llabería:
Reuse Detector: Improving the Management of STT-RAM SLLCs. CoRR abs/2402.00533 (2024) - 2022
- [i3]Carlos Escuin, Pablo Ibáñez, Teresa Monreal, José M. Llabería, Víctor Viñals:
Forecasting lifetime and performance of a novel NVM last-level cache with compression. CoRR abs/2204.03512 (2022) - [i2]Carlos Escuin, Pablo Ibáñez, Teresa Monreal, José M. Llabería, Víctor Viñals:
L2C2: Last-Level Compressed-Cache NVM and a Procedure to Forecast Performance and Lifetime. CoRR abs/2204.09504 (2022) - 2012
- [i1]Pablo García-Risueño, Pablo E. Ibáñez:
A review of High Performance Computing foundations for scientists. CoRR abs/1205.5177 (2012)
Coauthor Index
aka: Jesús Alastruey
aka: Teresa Monreal
aka: José M. Llabería
aka: Víctor Viñals Yúfera
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