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Xuan Hu 0002
Person information
- affiliation: University of Texas at Dallas, Richardson, TX, USA
 
Other persons with the same name
- Xuan Hu — disambiguation page
 - Xuan Hu 0001 
 — Beijing University of Chemical Technology, College of Information Science and Technology, Beijing, China 
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2020 – today
- 2025
 
[j5]Alexander J. Edwards
, Naimul Hassan
, Jared Arzate
, Alexander N. Chin
, Dhritiman Bhattacharya
, Mustafa M. Shihab
, Peng Zhou
, Xuan Hu
, Jayasimha Atulasimha
, Yiorgos Makris
, Joseph S. Friedman
:
Physically Secure Logic Locking With Nanomagnet Logic. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 44(1): 105-118 (2025)- 2023
 
[j4]Xuan Hu
, Can Cui
, Samuel Liu, Felipe García-Sánchez, Wesley H. Brigner, Benjamin W. Walker
, Alexander J. Edwards, T. Patrick Xiao
, Christopher H. Bennett
, Naimul Hassan, Michael P. Frank, Jean Anne C. Incorvia, Joseph S. Friedman:
Magnetic skyrmions and domain walls for logical and neuromorphic computing. Neuromorph. Comput. Eng. 3(2): 22003 (2023)
[i12]Benjamin W. Walker, Alexander J. Edwards, Xuan Hu, Michael P. Frank, Felipe García-Sánchez, Joseph S. Friedman:
Near-Landauer Reversible Skyrmion Logic with Voltage-Based Propagation. CoRR abs/2301.10700 (2023)
[i11]Xintong Li, Peng Zhou, Xuan Hu, Ethan Rivers, Kenji Watanabe, Takashi Taniguchi, Deji Akinwande, Joseph S. Friedman, Jean Anne C. Incorvia:
Cascaded Logic Gates Based on High-Performance Ambipolar Dual-Gate WSe2 Thin Film Transistors. CoRR abs/2305.01790 (2023)- 2022
 
[c8]Alexander J. Edwards, Naimul Hassan, Dhritiman Bhattacharya, Mustafa M. Shihab, Peng Zhou, Xuan Hu, Jayasimha Atulasimha
, Yiorgos Makris, Joseph S. Friedman
:
Physically and Algorithmically Secure Logic Locking with Hybrid CMOS/Nanomagnet Logic Circuits. DATE 2022: 17-22
[c7]Wesley H. Brigner, Naimul Hassan, Xuan Hu, Christopher H. Bennett, Felipe García-Sánchez, Matthew J. Marinella, Jean Anne C. Incorvia, Joseph S. Friedman:
Purely Spintronic Leaky Integrate-and-Fire Neurons. ISCAS 2022: 1189-1193
[i10]Xuan Hu, Benjamin W. Walker, Felipe García-Sánchez, Alexander J. Edwards, Peng Zhou, Jean Anne C. Incorvia, Alexandru Paler, Michael P. Frank, Joseph S. Friedman:
Logical and Physical Reversibility of Conservative Skyrmion Logic. CoRR abs/2203.13912 (2022)- 2021
 
[j3]Vaibhav Vyas
, Lucian Jiang-Wei, Peng Zhou, Xuan Hu
, Joseph S. Friedman
:
Karnaugh Map Method for Memristive and Spintronic Asymmetric Basis Logic Functions. IEEE Trans. Computers 70(1): 128-138 (2021)
[j2]Xuan Hu
, Amy S. Abraham, Jean Anne C. Incorvia
, Joseph S. Friedman
:
Hybrid Pass Transistor Logic With Ambipolar Transistors. IEEE Trans. Circuits Syst. I Regul. Pap. 68(1): 301-310 (2021)
[c6]Naimul Hassan, Alexander J. Edwards, Dhritiman Bhattacharya, Mustafa M. Shihab, Varun Venkat, Peng Zhou, Xuan Hu, Shamik Kundu, Abraham Peedikayil Kuruvila, Kanad Basu, Jayasimha Atulasimha
, Yiorgos Makris, Joseph S. Friedman
:
Secure Logic Locking with Strain-Protected Nanomagnet Logic. DAC 2021: 127-132
[i9]Benjamin W. Walker, Can Cui, Felipe García-Sánchez, Jean Anne C. Incorvia, Xuan Hu, Joseph S. Friedman:
Skyrmion Logic Clocked via Voltage Controlled Magnetic Anisotropy. CoRR abs/2103.02724 (2021)
[i8]Pranav O. Mathews, Christian B. Duffee, Abel Thayil, Ty E. Stovall, Christopher H. Bennett, Felipe García-Sánchez, Matthew J. Marinella, Jean Anne C. Incorvia, Naimul Hassan, Xuan Hu, Joseph S. Friedman:
High-Speed CMOS-Free Purely Spintronic Asynchronous Recurrent Neural Network. CoRR abs/2107.02238 (2021)- 2020
 
[c5]Naimul Hassan, Wesley H. Brigner, Xuan Hu, Otitoaleke G. Akinola, Christopher H. Bennett, Matthew J. Marinella, Felipe García-Sánchez, Jean Anne C. Incorvia, Joseph S. Friedman:
CMOS-Free Magnetic Domain Wall Leaky Integrate-and-Fire Neurons with Intrinsic Lateral Inhibition. ISCAS 2020: 1-5
[c4]Xuan Hu, Alexander J. Edwards, T. Patrick Xiao, Christopher H. Bennett, Jean Anne C. Incorvia, Matthew J. Marinella, Joseph S. Friedman:
Process Variation Model and Analysis for Domain Wall-Magnetic Tunnel Junction Logic. ISCAS 2020: 1-5
[c3]Xuan Hu, Naimul Hassan, Wesley H. Brigner, Maverick Chauwin, Joseph S. Friedman:
Device Modeling and Circuit Design for Scalable Beyond-CMOS Computing. VLSI-SOC 2020: 210-211
[i7]Wesley H. Brigner, Naimul Hassan, Xuan Hu, Christopher H. Bennett, Felipe García-Sánchez, Matthew J. Marinella, Jean Anne C. Incorvia, Joseph S. Friedman:
CMOS-Free Multilayer Perceptron Enabled by Four-Terminal MTJ Device. CoRR abs/2002.00862 (2020)
[i6]Xuan Hu, Joseph S. Friedman:
Hybrid Pass Transistor Logic with Dual-Gate Ambipolar CNTFETs. CoRR abs/2002.01932 (2020)
[i5]Xuan Hu, Brighton A. Hill, Felipe García-Sánchez, Joseph S. Friedman:
Threshold Logic with Current-Driven Magnetic Domain Walls. CoRR abs/2007.00815 (2020)
[i4]Wesley H. Brigner, Naimul Hassan, Xuan Hu, Christopher H. Bennett, Felipe García-Sánchez, Can Cui, Alvaro Velasquez, Matthew J. Marinella, Jean Anne C. Incorvia, Joseph S. Friedman:
Domain Wall Leaky Integrate-and-Fire Neurons with Shape-Based Configurable Activation Functions. CoRR abs/2011.06075 (2020)
2010 – 2019
- 2019
 
[j1]Xuan Hu
, Michael J. Schultis, Matthew Kramer, Archit Bagla, Akshay Shetty
, Joseph S. Friedman
:
Overhead Requirements for Stateful Memristor Logic. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(1): 263-273 (2019)
[i3]Wesley H. Brigner, Naimul Hassan, Lucian Jiang-Wei, Xuan Hu, Diptish Saha, Christopher H. Bennett, Matthew J. Marinella, Jean Anne C. Incorvia, Felipe García-Sánchez, Joseph S. Friedman:
Shape-based Magnetic Domain Wall Drift for an Artificial Spintronic Leaky Integrate-and-Fire Neuron. CoRR abs/1905.05485 (2019)
[i2]Farid Kenarangi, Xuan Hu, Yihan Liu, Jean Anne C. Incorvia, Joseph S. Friedman, Inna Partin-Vaisband:
Exploiting Dual-Gate Ambipolar CNFETs for Scalable Machine Learning Classification. CoRR abs/1912.04068 (2019)- 2018
 
[i1]Maverick Chauwin, Xuan Hu, Felipe García-Sánchez, Neilesh Betrabet, Christoforos Moutafis, Joseph S. Friedman:
Conservative Skyrmion Logic System. CoRR abs/1806.10337 (2018)- 2017
 
[c2]Xuan Hu
, Joseph S. Friedman:
Closed-form model for dual-gate ambipolar CNTFET circuit design. ISCAS 2017: 1-4
[c1]Xuan Hu
, Joseph S. Friedman:
Transient model with interchangeability for dual-gate ambipolar CNTFET logic design. NANOARCH 2017: 61-66
Coauthor Index

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last updated on 2025-11-04 01:53 CET by the dblp team
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