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Balaji Jayaraman
This is just a disambiguation page, and is not intended to be the bibliography of an actual person. Any publication listed on this page has not been assigned to an actual author yet. If you know the true author of one of the publications listed below, you are welcome to contact us.
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2020 – today
- 2021
- [c5]Balaji Jayaraman, Ajoy Kanti Ghosh:
Cascaded and Non-Cascaded Incremental Nonlinear Dynamic Inversion Flight Control Applied to a Light Aircraft. ANZCC 2021: 189-194 - 2020
- [j5]Shivakanth Chary Puligilla, Balaji Jayaraman:
Assessment of end-to-end and sequential data-driven learning for non-intrusive modeling of fluid flows. Adv. Comput. Math. 46(4): 55 (2020) - [j4]Balaji Jayaraman, S. M. Abdullah Al-Mamun:
On Data-Driven Sparse Sensing and Linear Estimation of Fluid Flows. Sensors 20(13): 3752 (2020)
2010 – 2019
- 2019
- [i1]Sam Allison, He Bai, Balaji Jayaraman:
Wind Estimation Using Quadcopter Motion: A Machine Learning Approach. CoRR abs/1907.05720 (2019) - 2018
- [j3]Balaji Jayaraman, Derek Leu, Janakiraman Viraraghavan, Alberto Cestero, Ming Yin, John Golz, Rajesh Reddy Tummuru, Ramesh Raghavan, Dan Moy, Thejas Kempanna, Faraz Khan, Toshiaki Kirihata, Subramanian S. Iyer:
80-kb Logic Embedded High-K Charge Trap Transistor-Based Multi-Time-Programmable Memory With No Added Process Complexity. IEEE J. Solid State Circuits 53(3): 949-960 (2018) - 2017
- [c4]Karthik Murali Madhavan Rathai, Jegan Amirthalingam, Balaji Jayaraman:
Robust tube-MPC based lane keeping system for autonomous driving vehicles. AIR 2017: 1:1-1:6 - 2016
- [c3]Janakiraman Viraraghavan, Derek Leu, Balaji Jayaraman, Alberto Cestero, Robert Kilker, Ming Yin, John Golz, Rajesh Reddy Tummuru, Ramesh Raghavan, Dan Moy, Thejas Kempanna, Faraz Khan, Toshiaki Kirihata, Subramanian S. Iyer:
80Kb 10ns read cycle logic Embedded High-K charge trap Multi-Time-Programmable Memory scalable to 14nm FIN with no added process complexity. VLSI Circuits 2016: 1-2 - 2012
- [c2]Balaji Jayaraman, Sneha Gupta, Yanli Zhang, Puneet Goyal, Herbert Ho, Rishikesh Krishnan, Sunfei Fang, Sungjae Lee, Douglas Daley, Kevin McStay, Bernhard Wunder, John Barth, Sadanand Deshpande, Paul C. Parries, Rajeev Malik, Paul D. Agnello, Scott R. Stiffler, Subramanian S. Iyer:
Performance analysis and modeling of deep trench decoupling capacitor for 32 nm high-performance SOI processors and beyond. ICICDT 2012: 1-4 - 2010
- [j2]Xia Ma, Paul T. Giguere, Balaji Jayaraman, Duan Z. Zhang:
Distribution coefficient algorithm for small mass nodes in material point method. J. Comput. Phys. 229(20): 7819-7833 (2010)
2000 – 2009
- 2009
- [j1]Balaji Jayaraman, Navakanta Bhat:
Performance Analysis of Subthreshold Cascode Current Mirror in 130 nm CMOS Technology. J. Low Power Electron. 5(4): 484-496 (2009) - 2007
- [c1]Balaji Jayaraman, Navakanta Bhat:
High Precision 16-bit Readout Gas Sensor Interface in 0.13µm CMOS. ISCAS 2007: 3071-3074
Coauthor Index
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