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ORCIDJwu-E Chen
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2010 – 2019
- 2019
[j12]Chih-Jen Cheng
, Kuo-Jen Lin, Jwu-E Chen:
Design of a range-segmented CMOS current-mode exponential circuit. Turkish J. Electr. Eng. Comput. Sci. 27(4): 2475-2487 (2019)- 2017
- [j11]Chien-Chih Huang, Jwu-E Chen, Chin-Long Wey:
PACES: A Partition-Centering-Based Symmetry Placement for Binary-Weighted Unit Capacitor Arrays. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(1): 134-145 (2017) - 2015
- [j10]Chien-Chih Huang, Chin-Long Wey, Jwu-E Chen, Pei-Wen Luo:
Performance-Driven Unit-Capacitor Placement of Successive-Approximation-Register ADCs. ACM Trans. Design Autom. Electr. Syst. 21(1): 15:1-15:17 (2015) - 2013
- [j9]Chien-Chih Huang, Chin-Long Wey, Jwu-E Chen, Pei-Wen Luo:
Optimal common-centroid-based unit capacitor placements for yield enhancement of switched-capacitor circuits. ACM Trans. Design Autom. Electr. Syst. 19(1): 7:1-7:13 (2013) - 2012
- [j8]Ying-Shen Juang, Lu-Ting Ko, Jwu-E Chen, Tze-Yun Sung, Hsi-Chin Hsin:
Optimization and Implementation of Scaling-Free CORDIC-Based Direct Digital Frequency Synthesizer for Body Care Area Network Systems. Comput. Math. Methods Medicine 2012: 651564:1-651564:9 (2012) - [j7]Lu-Ting Ko, Jwu-E Chen, Yaw-Shih Shieh, Hsi-Chin Hsin, Tze-Yun Sung:
Nested Quantization Index Modulation for Reversible Watermarking and Its Application to Healthcare Information Management Systems. Comput. Math. Methods Medicine 2012: 839161:1-839161:8 (2012) - [j6]Kuo-Jen Lin, Chih-Jen Cheng, Hsin-Cheng Su, Jwu-E Chen:
A CMOS Current-Mode S-Shape Correction Circuit with Shape-Adjustable Control. IEICE Trans. Electron. 95-C(11): 1730-1736 (2012) - [c7]Kuen-Long Leu, Jwu-E Chen, Chin-Long Wey, Yung-Yuan Chen:
Generic Reliability Analysis for Safety-Critical FlexRay Drive-By-Wire Systems. ICCVE 2012: 216-221 - 2011
- [j5]Pei-Wen Luo, Jwu-E Chen, Chin-Long Wey:
Design Methodology for Yield Enhancement of Switched-Capacitor Analog Integrated Circuits. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 94-A(1): 352-361 (2011) - [c6]Chien-Chih Huang, Jwu-E Chen, Pei-Wen Luo, Chin-Long Wey:
Yield-award placement optimization for Switched-Capacitor analog integrated circuits. SoCC 2011: 170-173 - 2010
- [j4]Jwu-E Chen, Pei-Wen Luo, Chin-Long Wey:
Placement Optimization for Yield Improvement of Switched-Capacitor Analog Integrated Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29(2): 313-318 (2010)
2000 – 2009
- 2009
- [c5]Jwu-E Chen, Lu-Tsou Yeh, Hua-Hsiang Tseng, G. W. Wu, In-Hang Chung:
Development of an Emotional Robot as a Teaching Assistant. Edutainment 2009: 518-523 - [c4]Jwu-E Chen, Pei-Wen Luo, Chin-Long Wey:
Yield evaluation of analog placement with arbitrary capacitor ratio. ISQED 2009: 179-184 - [c3]Kuen-Long Leu, Chin-Long Wey, Jwu-E Chen, Yung-Yuan Chen:
Robustness investigation of the FlexRay system. SIES 2009: 148-151 - 2008
- [j3]Pei-Wen Luo, Jwu-E Chen, Chin-Long Wey, Liang-Chia Cheng, Ji-Jan Chen, Wen Ching Wu:
Impact of Capacitance Correlation on Yield Enhancement of Mixed-Signal/Analog Integrated Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(11): 2097-2101 (2008) - 2007
- [j2]Shih-Ping Lin, Chung-Len Lee, Jwu-E Chen, Ji-Jan Chen, Kun-Lun Luo, Wen Ching Wu:
A Multilayer Data Copy Test Data Compression Scheme for Reducing Shifting-in Power for Multiple Scan Design. IEEE Trans. Very Large Scale Integr. Syst. 15(7): 767-776 (2007) - 2005
- [c2]Sheng-Hui Hsu, Jen-Hang Wang, Ben Chang, Jwu-E Chen, Kuo-Chin Fan, Tak-Wai Chan:
Educational Robot - A Case Study for Robot Learning Companion. ICCE 2005: 686-689 - 2002
- [j1]Chih-Wen Lu, Chung-Len Lee, Chauchin Su, Jwu-E Chen:
Analysis of Application of the IDDQ Technique to the Deep Sub-Micron VLSI Testing. J. Electron. Test. 18(1): 89-97 (2002)
1990 – 1999
- 1995
- [c1]Yung-Yuan Chen, Ching-Hwa Cheng, Jwu-E Chen:
An efficient switching network fault diagnosis for reconfigurable VLSI/WSI array processors. VLSI Design 1995: 349-354
Coauthor Index
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