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ORCIDVera Pantelic
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2020 – today
- 2024
[j9]Federico Formica
, Tony Fan, Akshay Rajhans, Vera Pantelic, Mark Lawford, Claudio Menghi:
Simulation-Based Testing of Simulink Models With Test Sequence and Test Assessment Blocks. IEEE Trans. Software Eng. 50(2): 239-257 (2024)- [c21]Stefan Ramdhan, Winnie Trandinh, Sathurshan Arulmohan, Xiayong Hu, Spencer Deevy, Victor Bandur, Vera Pantelic, Mark Lawford, Alan Wassyng:
Simulation-based Analysis of a Novel Loop-based Road Topology for Autonomous Vehicles. IV 2024: 1000-1007 - [i4]Stefan Ramdhan, Winnie Trandinh, Sathurshan Arulmohan, Xiayong Hu, Spencer Deevy, Victor Bandur, Vera Pantelic, Mark Lawford, Alan Wassyng:
Simulation-based Analysis of a Novel Loop-based Road Topology for Autonomous Vehicles. CoRR abs/2402.10226 (2024) - 2023
- [j8]Monika Jaskolka, Vera Pantelic, Alan Wassyng, Richard F. Paige, Mark Lawford:
Repository mining for changes in Simulink and Stateflow models. Softw. Syst. Model. 22(5): 1713-1732 (2023) - [c20]Faezeh Siavashi, Horacio Hoyos Rodriguez, Vera Pantelic, Mark Lawford, Richard F. Paige, Monika Jaskolka, Guanrui Hou, Alessandro Verde:
Bridging the Gap Between System Architecture and Software Design using Model Transformation. ISSREW 2023: 51-56 - [c19]Horacio Hoyos Rodriguez, Naveen Ganesh Muralidharan, Faezeh Siavashi, Vera Pantelic, Victor Bandur, Mark Lawford, Richard F. Paige:
An Automotive Architecture Product Line for E/E Powertrain Architectures. MoDELS (Companion) 2023: 715-719 - [c18]Victor Bandur, Mark Lawford, Sébastien Mosser, Richard F. Paige, Vera Pantelic, Alan Wassyng:
Using Assurance Cases to Prevent Malicious Behaviour from Targeting Safety Vulnerabilities. SAFECOMP Workshops 2023: 5-14 - [c17]Ryan Kapinski, Vera Pantelic, Victor Bandur, Alan Wassyng, Mark Lawford:
Assurance Cases for Timing Properties of Automotive TSN Networks. SAFECOMP Workshops 2023: 26-31 - [c16]Federico Formica, Nicholas Petrunti, Lucas Bruck, Vera Pantelic, Mark Lawford, Claudio Menghi:
Test Case Generation for Drivability Requirements of an Automotive Cruise Controller: An Experience with an Industrial Simulator. ESEC/SIGSOFT FSE 2023: 1949-1960 - [i3]Federico Formica, Nicholas Petrunti, Lucas Bruck, Vera Pantelic, Mark Lawford, Claudio Menghi:
Test Case Generation for Drivability Requirements of an Automotive Cruise Controller: An Experience with an Industrial Simulator. CoRR abs/2305.18608 (2023) - 2022
- [c15]Naveen Ganesh Muralidharan, Vera Pantelic, Victor Bandur, Richard F. Paige:
Integrating Software Issue Tracking and Traceability Models. ICSME 2022: 429-433 - [i2]Federico Formica, Tony Fan, Akshay Rajhans, Vera Pantelic, Mark Lawford, Claudio Menghi:
Simulation-based Testing of Simulink Models with Test Sequence and Test Assessment Blocks. CoRR abs/2212.11589 (2022) - 2021
- [j7]Victor Bandur, Gehan M. K. Selim, Vera Pantelic, Mark Lawford:
Making the Case for Centralized Automotive E/E Architectures. IEEE Trans. Veh. Technol. 70(2): 1230-1245 (2021) - [c14]Victor Bandur, Vera Pantelic, Timofey Tomashevskiy, Mark Lawford:
A Safety Architecture for Centralized E/E Architectures. DSN Workshops 2021: 67-70 - [c13]Monika Jaskolka, Vera Pantelic, Alan Wassyng, Mark Lawford, Richard F. Paige:
Repository Mining for Changes in Simulink Models. MoDELS 2021: 46-57 - 2020
- [c12]Monika Jaskolka, Stephen Scott, Vera Pantelic, Alan Wassyng, Mark Lawford:
Applying Modular Decomposition in Simulink. ISSRE Workshops 2020: 31-36 - [c11]Bennett Mackenzie, Vera Pantelic, Gordon Marks, Stephen Wynn-Williams, Gehan M. K. Selim, Mark Lawford, Alan Wassyng, Moustapha Diab, Feisel Weslati:
Change impact analysis in Simulink designs of embedded systems. ESEC/SIGSOFT FSE 2020: 1274-1284 - [i1]Monika Jaskolka, Vera Pantelic, Alan Wassyng, Mark Lawford:
Supporting Modularity in Simulink Models. CoRR abs/2007.10120 (2020)
2010 – 2019
- 2019
- [c10]Stephen Wynn-Williams, Zinovy Diskin, Vera Pantelic, Mark Lawford, Gehan M. K. Selim, Curtis Milo, Moustapha Diab, Feisel Weslati:
SL2SF: Refactoring Simulink to Stateflow. FASE 2019: 264-281 - [c9]Vera Pantelic, Alexander Schaap, Alan Wassyng, Victor Bandur, Mark Lawford:
Something is Rotten in the State of Documenting Simulink Models. MODELSWARD 2019: 503-510 - 2018
- [j6]Vera Pantelic, Steven M. Postma, Mark Lawford, Monika Jaskolka, Bennett Mackenzie, Alexandre Korobkine, Marc Bender, Jeff Ong, Gordon Marks, Alan Wassyng:
Software engineering practices and Simulink: bridging the gap. Int. J. Softw. Tools Technol. Transf. 20(1): 95-117 (2018) - [c8]Alexander Schaap, Gordon Marks, Vera Pantelic, Mark Lawford, Gehan M. K. Selim, Alan Wassyng, Lucian M. Patcas:
Documenting Simulink designs of embedded systems. MoDELS (Companion) 2018: 47-51 - 2016
- [c7]Archana Mallya, Vera Pantelic, Morayo Adedjouma, Mark Lawford, Alan Wassyng:
Using STPA in an ISO 26262 Compliant Process. SAFECOMP 2016: 117-129 - 2015
- [j5]Marc Bender, Karen Laurin, Mark Lawford, Vera Pantelic, Alexandre Korobkine, Jeff Ong, Bennett Mackenzie, Monika Bialy, Steven M. Postma:
Signature required: Making Simulink data flow and interfaces explicit. Sci. Comput. Program. 113: 29-50 (2015) - [c6]Monika Bialy, Mark Lawford, Vera Pantelic, Alan Wassyng:
A Methodology for the Simplification of Tabular Designs in Model-Based Development. FormaliSE@ICSE 2015: 47-53 - [c5]Vera Pantelic, Steven M. Postma, Mark Lawford, Alexandre Korobkine, Bennett Mackenzie, Jeff Ong, Marc Bender:
A Toolset for Simulink - Improving Software Engineering Practices in Development with Simulink. MODELSWARD 2015: 50-61 - 2014
- [c4]Marc Bender, Karen Laurin, Mark Lawford, Jeff Ong, Steven M. Postma, Vera Pantelic:
Signature Required - Making Simulink Data Flow and Interfaces Explicit. MODELSWARD 2014: 119-131 - [c3]Vera Pantelic, Mark Lawford, Steven M. Postma:
A Framework for Supervisory Control of Probabilistic Discrete Event Systems. WODES 2014: 477-484 - 2012
- [j4]Vera Pantelic, Mark Lawford:
A pseudometric in supervisory control of probabilistic discrete event systems. Discret. Event Dyn. Syst. 22(4): 479-510 (2012) - [j3]Vera Pantelic, Mark Lawford:
Optimal Supervisory Control of Probabilistic Discrete Event Systems. IEEE Trans. Autom. Control. 57(5): 1110-1124 (2012) - 2010
- [c2]Vera Pantelic, Mark Lawford:
Use of a metric in supervisory control of probabilistic discrete event systems. WODES 2010: 217-222
2000 – 2009
- 2009
- [j2]Vera Pantelic, Steven M. Postma, Mark Lawford:
Probabilistic Supervisory Control of Probabilistic Discrete Event Systems. IEEE Trans. Autom. Control. 54(8): 2013-2018 (2009) - 2006
- [j1]Mark Lawford, Vera Pantelic, Hong Zhang:
Towards Integrated Verification of Timed Transition Models. Fundam. Informaticae 70(1-2): 75-110 (2006) - [c1]Vera Pantelic, Xiao-Hui Jin, Mark Lawford, David Lorge Parnas:
Inspection of Concurrent Systems: Combining Tables, Theorem Proving and Model Checking. Software Engineering Research and Practice 2006: 629-635
Coauthor Index
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last updated on 2024-08-01 21:09 CEST by the dblp team
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