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2010 – 2019
- 2018
[c4]Hou-Jen Ko, Zhiyuan Li, Samuel P. Midkiff
:
Optimizing data layout and system configuration on FPGA-based heterogeneous platforms. ICCAD 2018: 119- 2013
- [j3]Shen-Fu Hsiao, Hou-Jen Ko, Yu-Ling Tseng, Wen-Liang Huang, Shin-Hung Lin, Chia-Sheng Wen:
Design of Hardware Function Evaluators Using Low-Overhead Nonuniform Segmentation With Address Remapping. IEEE Trans. Very Large Scale Integr. Syst. 21(5): 875-886 (2013) - [c3]Hongtao Yu, Hou-Jen Ko, Zhiyuan Li:
General data structure expansion for multi-threading. PLDI 2013: 243-252 - 2012
- [j2]Shen-Fu Hsiao, Hou-Jen Ko, Chia-Sheng Wen:
Two-Level Hardware Function Evaluation Based on Correction of Normalized Piecewise Difference Functions. IEEE Trans. Circuits Syst. II Express Briefs 59-II(5): 292-296 (2012) - 2011
- [j1]Hou-Jen Ko, Shen-Fu Hsiao:
Design and Application of Faithfully Rounded and Truncated Multipliers With Combined Deletion, Reduction, Truncation, and Rounding. IEEE Trans. Circuits Syst. II Express Briefs 58-II(5): 304-308 (2011) - 2010
- [c2]Hou-Jen Ko, Shen-Fu Hsiao, Wen-Liang Huang:
A new non-uniform segmentation and addressing remapping strategy for hardware-oriented function evaluators based on polynomial approximation. ISCAS 2010: 4153-4156
2000 – 2009
- 2007
- [c1]Hou-Jen Ko, Chun-Jen Tsai:
A Double-Issue Java Processor Design for Embedded Applications. ISCAS 2007: 3502-3505
Coauthor Index
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