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ORCIDM. Mohamed Asan Basiri
Person information
- affiliation: Indian Institute of Information Technology, Design and Manufacturing, Kurnool, India
- affiliation (former): Indian Institute of Technology, Kanpur, India
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Journal Articles
- 2022
[j14]M. Mohamed Asan Basiri
:
Versatile Architectures of Artificial Neural Network with Variable Capacity. Circuits Syst. Signal Process. 41(11): 6333-6353 (2022)- [j13]M. Mohamed Asan Basiri:
Efficient VLSI architecture of 3D discrete transformation. Integr. 82: 136-146 (2022) - 2020
- [j12]M. Mohamed Asan Basiri:
Efficient VLSI architectures of lifting based 3D discrete wavelet transform. IET Comput. Digit. Tech. 14(6): 247-255 (2020) - 2019
- [j11]M. Mohamed Asan Basiri, Sandeep K. Shukla:
Asynchronous hardware implementations for crypto primitives. Microprocess. Microsystems 64: 221-236 (2019) - [j10]M. Mohamed Asan Basiri, Sandeep K. Shukla:
LFSR based versatile divider architectures for BCH and RS error correction encoders. Microprocess. Microsystems 71 (2019) - [j9]M. Mohamed Asan Basiri, Sk. Noor Mahammad:
Discrete Orthogonal Multi-transform on Chip (DOMoC). J. Signal Process. Syst. 91(5): 437-457 (2019) - 2018
- [j8]M. Mohamed Asan Basiri, Sandeep K. Shukla:
Low power hardware implementations for network packet processing elements. Integr. 62: 170-181 (2018) - 2017
- [j7]M. Mohamed Asan Basiri, S. K. Noor Mohammad:
Quadruple throughput fixed point quarter precision multiply accumulate circuit design. IET Comput. Digit. Tech. 11(5): 183-189 (2017) - [j6]M. Mohamed Asan Basiri, Sandeep K. Shukla:
Flexible VLSI architectures for Galois field multipliers. Integr. 59: 109-124 (2017) - 2016
- [j5]M. Mohamed Asan Basiri, Sk. Noor Mahammad:
Multi-mode parallel and folded VLSI architectures for 1D-fast Fourier transform. Integr. 55: 43-56 (2016) - [j4]M. Mohamed Asan Basiri, Sk. Noor Mahammad:
An efficient VLSI architecture for lifting based 1D/2D discrete wavelet transform. Microprocess. Microsystems 47: 404-418 (2016) - [j3]M. Mohamed Asan Basiri, Sk. Noor Mahammad:
High speed multiplexer design using tree based decomposition algorithm. Microelectron. J. 51: 99-111 (2016) - 2015
- [j2]M. Mohamed Asan Basiri, Sk. Noor Mahammad:
Configurable Folded IIR Filter Design. IEEE Trans. Circuits Syst. II Express Briefs 62-II(12): 1144-1148 (2015) - 2014
- [j1]M. Mohamed Asan Basiri, Sk. Noor Mahammad:
An Efficient Hardware-Based Higher Radix Floating Point MAC Design. ACM Trans. Design Autom. Electr. Syst. 20(1): 15:1-15:25 (2014)
Conference and Workshop Papers
- 2023
- [c17]M. V. D. B. Anjaneya, M. Mohamed Asan Basiri:
High Throughput Circuit Designs of Digital to Analog Converter. RAIT 2023: 1-6 - [c16]Shivalasya Chinthala, M. Mohamed Asan Basiri:
High Throughput Circuit Design of Flash Type Analog to Digital Converter. RAIT 2023: 1-6 - [c15]M. Mohamed Asan Basiri, PVSR Bharadwaja:
Efficient FPGA Implementations of Lifting based DWT using Partial Reconfiguration. VLSID 2023: 319-324 - 2022
- [c14]Hariveer Inumarty, M. Mohamed Asan Basiri:
Low Cost Hardware Design of ECC Scalar Multiplication. VDAT 2022: 387-396 - 2021
- [c13]M. Mohamed Asan Basiri:
Hardware based Entropy Calculation in Crypto Applications. iSES 2021: 18-22 - [c12]M. Mohamed Asan Basiri:
Hardware based Order Book Design in High Frequency Algo Trading. iSES 2021: 285-288 - 2020
- [c11]Hariveer Inumarty, M. Mohamed Asan Basiri:
Reconfigurable Hardware Design for Polynomial Galois Field Arithmetic Operations. VDAT 2020: 1-5 - 2019
- [c10]M. Mohamed Asan Basiri, Sandeep K. Shukla:
Formal Hardware Verification of InfoSec Primitives. ISVLSI 2019: 140-145 - [c9]M. Mohamed Asan Basiri:
Flexible Adaptive FIR Filter Designs Using LMS Algorithm. VDAT 2019: 61-71 - [c8]M. Mohamed Asan Basiri:
Asynchronous Hardware Design for Floating Point Multiply-Accumulate Circuit. VDAT 2019: 247-257 - 2018
- [c7]M. Mohamed Asan Basiri, Sandeep K. Shukla:
Efficient Hardware-Software Codesigns of AES Encryptor and RS-BCH Encoder. VDAT 2018: 3-15 - [c6]M. Mohamed Asan Basiri, Sk. Noor Mahammad:
An Efficient VLSI Architecture for Convolution Based DWT Using MAC. VLSID 2018: 271-276 - 2017
- [c5]M. Mohamed Asan Basiri, Sandeep K. Shukla:
Flexible Composite Galois Field GF((2^m)^2) Multiplier Designs. VDAT 2017: 3-14 - [c4]M. Mohamed Asan Basiri, Sk. Noor Mahammad:
High Performance Integer DCT Architectures for HEVC. VLSID 2017: 121-126 - 2016
- [c3]M. Mohamed Asan Basiri, Sandeep K. Shukla:
Hardware optimizations for crypto implementations (Invited paper). VDAT 2016: 1-6 - [c2]M. Mohamed Asan Basiri, S. K. Noor Mahammad:
An Efficient VLSI Architecture for Discrete Hadamard Transform. VLSID 2016: 140-145 - 2014
- [c1]M. Mohamed Asan Basiri, S. K. Noor Mahammad:
Memory Based Multiplier Design in Custom and FPGA Implementation. ISI (1) 2014: 253-265
Coauthor Index
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