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ORCIDJosé Raúl Loo-Yau
Person information
- affiliation: University of Guadalajara, Mexico
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Journal Articles
- 2023
[j2]Ismary Lavandera-Hernández, José Raúl Loo-Yau
, J. Apolinar Reynoso-Hernández, Daniel Ochoa-Armas, Pablo Moreno Villalobos:
Frequency-Dependent Design Spaces for Continuous Mode Class-J*/B/J PA. IEEE Trans. Circuits Syst. I Regul. Pap. 70(1): 203-213 (2023)- 2016
- [j1]José-Cruz Nuñez Pérez, José Ricardo Cárdenas-Valdez, Katherine Montoya-Villegas, J. Apolinar Reynoso-Hernández, José Raúl Loo-Yau, Christian Gontrand, Esteban Tlelo-Cuautle:
FPGA-based test bed for measurement of AM/AM and AM/PM distortion and modeling memory effects in RF PAs. Integr. 52: 291-300 (2016)
Conference and Workshop Papers
- 2019
- [c7]C. Perez-Wences, José Raúl Loo-Yau, Pablo Moreno:
Simple and Low-Cost Measurement Test Setup to Determine the RF, LO and IF Impedances for Designing GaN FET Resistive Mixer. MWSCAS 2019: 544-547 - 2015
- [c6]David Martinez, Pablo Moreno, José Raúl Loo-Yau:
A new model for non-uniform transmission lines. CCE 2015: 1-5 - 2014
- [c5]J. A. Rentería-Cedano, L. M. Aguilar-Lobo, Susana Ortega-Cisneros, José Raúl Loo-Yau, Juan José Raygoza-Panduro:
FPGA Implementation of a NARX Network for Modeling Nonlinear Systems. CIARP 2014: 88-95 - [c4]J. A. Rentería-Cedano, L. M. Aguilar-Lobo, José Raúl Loo-Yau, Susana Ortega-Cisneros:
Implementation of a NARX neural network in a FPGA for modeling the inverse characteristics of power amplifiers. MWSCAS 2014: 209-212 - [c3]Lina M. Aguilar-Lobo, Alberto Garcia-Osorio, José Raúl Loo-Yau, Susana Ortega-Cisneros, Pablo Moreno, José Ernesto Rayas-Sánchez, J. Apolinar Reynoso-Hernández:
A digital predistortion technique based on a NARX network to linearize GaN class F power amplifiers. MWSCAS 2014: 717-720 - 2013
- [c2]Alberto Garcia-Osorio, José Raúl Loo-Yau, Pablo Moreno, Luis Ilich Guerrero-Linares, J. Apolinar Reynoso-Hernández:
A simple procedure to synthesize input and output matching networks with short stub for class F-1 PAs. MWSCAS 2013: 784-787 - 2012
- [c1]Luis I. Guerrero-Linares, F. Sandoval-Ibarra, José Raúl Loo-Yau:
Non-idealities in analog circuits design: What does it really mean? MWSCAS 2012: 586-589
Coauthor Index
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