Peng Bai

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Doug B. Ingerly

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Publications

2020
[c9]
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  persistent URL:
  - https://dblp.org/rec/conf/irps/PrasadCGHKLMNOP20
Chetan Prasad, Sunny Chugh, Hannes Greve, I-chen Ho, Enamul Kabir, Cheyun Lin, Mahjabin Maksud, Steven R. Novak, Benjamin Orr, Keun Woo Park, Anthony Schmitz, Zhizheng Zhang, Peng Bai, Doug B. Ingerly, Emre Armagan, Hsinwei Wu, Patrick N. Stover, Lance Hibbeler, Michael O'Day, Daniel Pantuso:
Silicon Reliability Characterization of Intel's Foveros 3D Integration Technology for Logic-on-Logic Die Stacking. IRPS 2020: 1-5
2015
[c5]
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  - conf/vlsic/JanACCCDHIJKSKK15
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Chia-Hong Jan, F. Al-amoody, H.-Y. Chang, T. Chang, Y.-W. Chen, N. Dias, Walid M. Hafez, Doug B. Ingerly, M. Jang, Eric Karl, S. K.-Y. Shi, K. Komeyli, H. Kilambi, A. Kumar, K. Byon, C.-G. Lee, J. Lee, T. Leo, P.-C. Liu, N. Nidhi, R. Olac-vaw, C. Petersburg, K. Phoa, Chetan Prasad, C. Quincy, R. Ramaswamy, T. Rana, L. Rockford, Aravinth Subramaniam, C. Tsai, Peter Vandervoorn, L. Yang, A. Zainuddin, Peng Bai:
A 14 nm SoC platform technology featuring 2^nd generation Tri-Gate transistors, 70 nm gate pitch, 52 nm metal pitch, and 0.0499 um² SRAM cells, optimized for low power, high performance and high density SoC products. VLSIC 2015: 12-

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