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Tsung-Hao Chen
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2010 – 2019
- 2010
- [j5]Tsung-Hao Chen, Cheng-Wu Chen:
Application of data mining to the spatial heterogeneity of foreclosed mortgages. Expert Syst. Appl. 37(2): 993-997 (2010) - [c10]Wangyang Zhang, Tsung-Hao Chen, Ming Yuan Ting, Xin Li:
Toward efficient large-scale performance modeling of integrated circuits via multi-mode/multi-corner sparse regression. DAC 2010: 897-902
2000 – 2009
- 2009
- [c9]Hong Zhang, Tsung-Hao Chen, Ming Yuan Ting, Xin Li:
Efficient design-specific worst-case corner extraction for integrated circuits. DAC 2009: 386-389 - 2006
- [j4]Ting-Ya Hsieh, Morris H. L. Wang, Cheng-Wu Chen, Chen-Yuan Chen, Shang-En Yu, Hsien-Chueh Yang, Tsung-Hao Chen:
A New Viewpoint of S-curve Regression Model and its Application to Construction Management. Int. J. Artif. Intell. Tools 15(2): 131-142 (2006) - 2005
- [j3]Yu-Min Lee, Yahong Cao, Tsung-Hao Chen, Janet Meiling Wang, Charlie Chung-Ping Chen:
HiPRIME: hierarchical and passivity preserved interconnect macromodeling engine for RLKC power delivery. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(6): 797-806 (2005) - 2004
- [j2]Jeng-Liang Tsai, Tsung-Hao Chen, Charlie Chung-Ping Chen:
Zero skew clock-tree optimization with buffer insertion/sizing and wire sizing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23(4): 565-572 (2004) - [c8]Clement Luk, Tsung-Hao Chen, Charlie Chung-Ping Chen:
Frequency-dependent reluctance extraction. ASP-DAC 2004: 792-797 - [c7]Tsung-Hao Chen, Jeng-Liang Tsai, Tanay Karnik:
HiSIM: hierarchical interconnect-centric circuit simulator. ICCAD 2004: 489-496 - 2003
- [j1]Tsung-Hao Chen, Clement Luk, Charlie Chung-Ping Chen:
INDUCTWISE: inductance-wise interconnect simulator and extractor. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22(7): 884-894 (2003) - [c6]Tsung-Hao Chen, Clement Luk, Charlie Chung-Ping Chen:
SuPREME: Substrate and Power-delivery Reluctance-Enhanced Macromodel Evaluation. ICCAD 2003: 786-792 - [c5]Rong Jiang, Tsung-Hao Chen, Charlie Chung-Ping Chen:
PODEA: Power delivery efficient analysis with realizable model reduction. ISCAS (4) 2003: 608-611 - [c4]Jeng-Liang Tsai, Tsung-Hao Chen, Charlie Chung-Ping Chen:
Optimal minimum-delay/area zero-skew clock tree wire-sizing in pseudo-polynomial time. ISPD 2003: 166-173 - 2002
- [c3]Yahong Cao, Yu-Min Lee, Tsung-Hao Chen, Charlie Chung-Ping Chen:
HiPRIME: hierarchical and passivity reserved interconnect macromodeling engine for RLKC power delivery. DAC 2002: 379-384 - [c2]Tsung-Hao Chen, Clement Luk, Hyungsuk Kim, Charlie Chung-Ping Chen:
INDUCTWISE: inductance-wise interconnect simulator and extractor. ICCAD 2002: 215-220 - 2001
- [c1]Tsung-Hao Chen, Charlie Chung-Ping Chen:
Efficient Large-Scale Power Grid Analysis Based on Preconditioned Krylov-Subspace Iterative Methods. DAC 2001: 559-562
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