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Alexandre Guerre
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2020 – today
- 2021
- [c14]David Cordova Morales, Pedro B. Velloso, Alexandre Guerre, Thi Mai Trang Nguyen, Guy Pujolle, Khaldoun Al Agha, Guillaume Dua:
Blockgraph proof-of-concept. SIGCOMM Posters and Demos 2021: 82-84
2010 – 2019
- 2016
- [c13]Gregory Vaumourin, Alexandre Guerre, Thomas Dombek, Denis Barthou:
Specific Read-Only Data Management for Memory System Optimization. PDP 2016: 337-340 - 2015
- [c12]Tanguy Sassolas, Chiara Sandionigi, Alexandre Guerre, Julien Mottin, Pascal Vivet, Hela Boussetta, Nicolas Peltier:
A simulation framework for rapid prototyping and evaluation of thermal mitigation techniques in many-core architectures. ISLPED 2015: 25-30 - 2014
- [j2]Gregory Vaumourin, Thomas Dombek, Alexandre Guerre, Denis Barthou:
Specific read only data management for memory hierarchy optimization. SIGBED Rev. 11(4): 55-60 (2014) - [j1]Yves Lhuillier, Maroun Ojail, Alexandre Guerre, Jean-Marc Philippe, Karim Ben Chehida, Farhat Thabet, Caaliph Andriamisaina, Chafic Jaber, Raphaël David:
HARS: A hardware-assisted runtime software for embedded many-core architectures. ACM Trans. Embed. Comput. Syst. 13(3s): 102:1-102:25 (2014) - [c11]Alexandre Guerre, Jean-Thomas Acquaviva, Yves Lhuillier:
A unified methodology for a fast benchmarking of parallel architecture. DATE 2014: 1-4 - [c10]Tanguy Sassolas, Chiara Sandionigi, Alexandre Guerre, Alexandre Aminot, Pascal Vivet, Hela Boussetta, Luca Ferro, Nicolas Peltier:
Early design stage thermal evaluation and mitigation: The locomotiv architectural case. DATE 2014: 1-2 - [c9]Yves Lhuillier, Jean-Marc Philippe, Alexandre Guerre, Michal Kierzynka, Ariel Oleksiak:
Parallel Architecture Benchmarking: From Embedded Computing to HPC, a FiPS Project Perspective. EUC 2014: 154-161 - [c8]Gregory Vaumourin, Thomas Dombek, Alexandre Guerre, Denis Barthou:
Specific Read Only Data Management for Memory Hierarchy Optimization. EWiLi 2014 - 2013
- [c7]Maroun Ojail, Raphaël David, Yves Lhuillier, Alexandre Guerre:
ARTM: a lightweight fork-join framework for many-core embedded systems. DATE 2013: 1510-1515 - [c6]Alexandre Aminot, Alexandre Guerre, Julien Peeters, Yves Lhuillier:
PACHA: Low Cost Bare Metal Development for Shared Memory Manycore Accelerators. ICCS 2013: 1644-1653 - 2012
- [c5]Nicolas Ventroux, Tanguy Sassolas, Alexandre Guerre, Béatrice Creusillet, Ronan Keryell:
SESAM/Par4All: a tool for joint exploration of MPSoC architectures and dynamic dataflow code generation. RAPIDO 2012: 9-16 - 2010
- [c4]Nicolas Ventroux, Alexandre Guerre, Tanguy Sassolas, L. Moutaoukil, Guillaume Blanc, Charly Bechara, Raphaël David:
SESAM: An MPSoC Simulation Environment for Dynamic Application Processing. CIT 2010: 1880-1886 - [c3]Alexandre Guerre, Nicolas Ventroux, Raphaël David, Alain Mérigot:
Hierarchical Network-on-Chip for Embedded Many-Core Architectures. NOCS 2010: 189-196 - [c2]Nicolas Ventroux, Tanguy Sassolas, Raphaël David, Guillaume Blanc, Alexandre Guerre, Charly Bechara:
SESAM extension for fast MPSoC architectural exploration and dynamic streaming applications. VLSI-SoC 2010: 341-346
2000 – 2009
- 2009
- [c1]Alexandre Guerre, Nicolas Ventroux, Raphaël David, Alain Mérigot:
Approximate-Timed Transactional Level Modeling for MPSoC Exploration: A Network-on-Chip Case Study. DSD 2009: 390-397
Coauthor Index
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