![](https://dblp1.uni-trier.de/img/logo.ua.320x120.png)
![](https://dblp1.uni-trier.de/img/dropdown.dark.16x16.png)
![](https://dblp1.uni-trier.de/img/peace.dark.16x16.png)
Остановите войну!
for scientists:
![search dblp search dblp](https://dblp1.uni-trier.de/img/search.dark.16x16.png)
![search dblp](https://dblp1.uni-trier.de/img/search.dark.16x16.png)
default search action
RAPIDO 2012: Paris, France
- Daniel Gracia Pérez, Smaïl Niar, Cristina Silvano, Morteza Biglari-Abhari:
Proceedings of the 2012 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools, RAPIDO '12, 23 January, 2012, Paris, France. ACM 2012, ISBN 978-1-4503-1114-4 - Muhammad Irfan Uddin
, Chris R. Jesshope, Michiel W. van Tol, Raphael Poss
:
Collecting signatures to model latency tolerance in high-level simulations of microthreaded cores. 1-8 - Nicolas Ventroux, Tanguy Sassolas, Alexandre Guerre, Béatrice Creusillet, Ronan Keryell:
SESAM/Par4All: a tool for joint exploration of MPSoC architectures and dynamic dataflow code generation. 9-16 - Raphael Poss
, Mike Lankamp, Muhammad Irfan Uddin
, Jaroslav Sykora, Leos Kafka:
Heterogeneous integration to simplify many-core architecture simulations. 17-24 - Chad D. Kersey, Arun Rodrigues, Sudhakar Yalamanchili:
A universal parallel front-end for execution driven microarchitecture simulation. 25-32 - Junjie Lai, André Seznec
:
Break down GPU execution time with an analytical method. 33-39
![](https://dblp1.uni-trier.de/img/cog.dark.24x24.png)
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.