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2010 – 2019
- 2012
[c5]Bert Serneels, Eldert Geukens, Bram De Muer, Tim Piessens
:
A 1.5W 10V-output Class-D amplifier using a boosted supply from a single 3.3V input in standard 1.8V/3.3V 0.18μm CMOS. ISSCC 2012: 94-96
2000 – 2009
- 2003
- [j4]Bram De Muer, Michiel S. J. Steyaert:
On the analysis of ΔΣ fractional-N frequency synthesizers for high-spectral purity. IEEE Trans. Circuits Syst. II Express Briefs 50(11): 784-793 (2003) - 2002
- [j3]Bram De Muer, Michel S. J. Steyaert:
A CMOS monolithic ΔΣ-controlled fractional-N frequency synthesizer for DCS-1800. IEEE J. Solid State Circuits 37(7): 835-844 (2002) - 2000
- [j2]Bram De Muer, Marc Borremans, Michiel Steyaert, G. Li Puma:
A 2-GHz low-phase-noise integrated LC-VCO set with flicker-noise upconversion minimization. IEEE J. Solid State Circuits 35(7): 1034-1038 (2000) - [j1]Michel S. J. Steyaert, Johan Janssens, Bram De Muer, Marc Borremans, Nobuyuki Itoh:
A 2-V CMOS cellular transceiver front-end. IEEE J. Solid State Circuits 35(12): 1895-1907 (2000) - [c4]Bram De Muer, Nobuyulu Itoh, Marc Borremans, Michiel Steyaert:
A 1.8 GHz highly-tunable low-phase-noise CMOS VCO. CICC 2000: 585-588 - [c3]Carl De Ranter, Bram De Muer, Geert Van der Plas, Peter J. Vancorenland, Michiel Steyaert, Georges G. E. Gielen, Willy M. C. Sansen:
CYCLONE: automated design and layout of RF LC-oscillators. DAC 2000: 11-14 - [c2]Marc Borremans, Bram De Muer, Michiel Steyaert:
The optimization of GHz integrated CMOS quadrature VCO's based on a poly-phase filter loaded differential oscillator. ISCAS 2000: 729-732
1990 – 1999
- 1999
- [c1]Bram De Muer, Carl De Ranter, Jan Crols, Michiel Steyaert:
A simulator-optimizer for the design of very low phase noise CMOS LC-oscillators. ICECS 1999: 1557-1560 - [r1]Michiel Steyaert, Marc Borremans, Johan Janssens, Bram De Muer:
RF Communication Circuits. The VLSI Handbook 1999
Coauthor Index
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