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ORCIDBaosheng Wang
- > Home > Persons > Baosheng Wang
Publications
- 2007
[j3]Qiang Xu
, Baosheng Wang, André Ivanov, Fung Yu Young:
Test scheduling for built-in self-tested embedded SRAMs with data retention faults. IET Comput. Digit. Tech. 1(3): 256-264 (2007)- [i1]Baosheng Wang, Yuejian Wu, André Ivanov:
A Fast Diagnosis Scheme for Distributed Small Embedded SRAMs. CoRR abs/0710.4655 (2007) - 2006
- [j2]Josh Yang, Baosheng Wang, Yuejian Wu, André Ivanov:
Fast detection of data retention faults and other SRAM cell open defects. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(1): 167-180 (2006) - 2005
- [j1]Baosheng Wang, Andy Kuo, Touraj Farahmand, André Ivanov, Yong B. Cho, Sassan Tabatabaei:
A Realistic Timing Test Model and Its Applications in High-Speed Interconnect Devices. J. Electron. Test. 21(6): 621-630 (2005) - [c10]Baosheng Wang, Josh Yang, Yuejian Wu, André Ivanov:
A retention-aware test power model for embedded SRAM. ASP-DAC 2005: 1180-1183 - [c9]Baosheng Wang, Yuejian Wu, André Ivanov:
A Fast Diagnosis Scheme for Distributed Small Embedded SRAMs. DATE 2005: 852-857 - [c8]Cristian Grecu, Partha Pratim Pande, Baosheng Wang, André Ivanov, Res Saleh:
Methodologies and Algorithms for Testing Switch-Based NoC Interconnects. DFT 2005: 238-246 - [c6]Baosheng Wang, Yuejian Wu, Josh Yang, André Ivanov, Yervant Zorian:
SRAM Retention Testing: Zero Incremental Time Integration with March Algorithms. VTS 2005: 66-71 - 2004
- [c5]Baosheng Wang, Yuejian Wu, André Ivanov:
Designs for Reducing Test Time of Distributed Small Embedded SRAMs. DFT 2004: 120-128 - [c4]Josh Yang, Baosheng Wang, André Ivanov:
Open Defects Detection within 6T SRAM Cells using a No Write Recovery Test Mode. VLSI Design 2004: 493-498 - [c3]Baosheng Wang, Josh Yang, James Cicalo, André Ivanov, Yervant Zorian:
Reducing Embedded SRAM Test Time under Redundancy Constraints. VTS 2004: 237-242 - 2003
- [c2]Baosheng Wang, Yong B. Cho, Sassan Tabatabaei, André Ivanov:
Yield, Overall Test Environment Timing Accuracy, and Defect Level Trade-Offs for High-Speed Interconnect Device Testing. Asian Test Symposium 2003: 348-353 - [c1]Baosheng Wang, Josh Yang, André Ivanov:
Reducing Test Time of Embedded SRAMs. MTDT 2003: 47-52
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